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6 commits

Author SHA1 Message Date
Kapil Porwal
93b7fd1d4d drivers/soundwire/cs42l42: Support CS42L42 SoundWire device
The CS42L42 low power audio codec can be connected over SoundWire and
be configured for mainboards to use:

- Data Port 0 and Bulk Register Access
- Data Port 1 is the 64bit data output for the headset
- Data Port 2 is the 64bit data input for the headset
- Data Port 3 is the 64bit data input for the headset

The data port and audio mode properties are filled out as best as
possible with the datasheet as a reference.

The ACPI address for the codec is calculated with the information in
the codec driver combined with the devicetree.cb hierarchy where the
link and unique IDs are extracted from the device path.

For example this device is connected to master link ID 0 and has strap
settings configuring it for unique ID 0.

chip drivers/soundwire/cs42l42
  register "desc" = ""Headset Codec""
  device generic 0.0 on end
end

This driver was tested with the rex0 reference design by booting
and disassembling the runtime SSDT to ensure that the devices have the
expected address and properties.

Device (SW00)
{
  Name (_ADR, 0x00001001FA424200)  // _ADR: Address
  Name (_DDN, "Headset Codec")  // _DDN: DOS Device Name
  Method (_STA, 0, NotSerialized)  // _STA: Status
  {
    Return (0x0F)
  }
  Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
  {
    GpioInt (Edge, ActiveBoth, Exclusive, PullDefault, 0x0000,
      "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, ,
      )
      {   // Pin list
        0x0166
      }
    GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly,
      "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, ,
      )
      {   // Pin list
        0x0167
      }
  })

  Name (_DSD, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "irq-gpios",
        Package () { \_SB.PCI0.HDAS.SNDW.SW00, Zero, Zero, Zero }
      },
      Package () { "reset-gpios",
        Package () { \_SB.PCI0.HDAS.SNDW.SW00, One, Zero, Zero }
      },
      Package () { "cirrus,ts-inv", One },
      Package () { "cirrus,ts-dbnc-rise", 0x05 },
      Package () { "cirrus,ts-dbnc-fall", Zero },
      Package () { "cirrus,btn-det-init-dbnce", 0x64 },
      Package () { "cirrus,btn-det-event-dbnce", 0x0A },
      Package () { "cirrus,bias-lvls",
        Package () { 0x0F, 0x08, 0x04, One }
      },
      Package () { "cirrus,hs-bias-ramp-rate", 0x02 },
      Package () { "cirrus,hs-bias-sense-disable", One },
      Package () { "mipi-sdw-sw-interface-revision", 0x00010000 },
      [...]
      Package () { "mipi-sdw-source-port-list", 0x02 },
      Package () { "mipi-sdw-sink-port-list", 0x0C }
    },

    ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
    Package ()
    {
      Package () { "mipi-sdw-port-bra-mode-0", "BRA0" },
      Package () { "mipi-sdw-dp-0-subproperties", "DP0" },
      Package () { "mipi-sdw-port-audio-mode-0", "MOD0" },
      Package () { "mipi-sdw-dp-1-source-subproperties", "SRC1" },
      Package () { "mipi-sdw-dp-2-sink-subproperties", "SNK2" },
      Package () { "mipi-sdw-dp-3-sink-subproperties", "SNK3"}
    }
  })
  Name (BRA0, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-bra-mode-bus-frequency-configs",
        Package () { 0x00AC4400, ... }
      },
      Package () { "mipi-sdw-bra-mode-max-data-per-frame", 0x1000 },
      Package () { "mipi-sdw-bra-mode-min-us-between-transactions", Zero }
    }
  })
  Name (DP0, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-port-max-wordlength", 0x40 },
      [...]
    },

    ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
    Package ()
    {
      Package () { "mipi-sdw-port-bra-mode-0", "BRA0" }
    }
  })
  Name (MOD0, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-audio-mode-bus-frequency-configs",
        Package () { 0x00AC4400, ... }
      },
      Package () { "mipi-sdw-audio-mode-max-sampling-frequency", 0x0002EE00 },
      Package () { "mipi-sdw-audio-mode-min-sampling-frequency", 0x1F40 },
      [...]
    }
  })
  Name (SRC1, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-data-port-type", Zero },
      [...]
    },

    ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
    Package ()
    {
      Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }
    }
  })
  Name (SNK2, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-data-port-type", Zero },
      [...]
    },

    ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
    Package ()
    {
      Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }
    }
  })
  Name (SNK3, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-data-port-type", Zero },
      [...]
    },

    ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
    Package ()
    {
      Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }
    }
  })
}

BUG=b:269497731
TEST=Verified SSDT for SNDW in the OS

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: Ic7cfe2a21c76ba01ad3dea2a5017b28743aeb9f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73279
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-25 21:22:32 +00:00
Kapil Porwal
1fe5fcf30d drivers/soundwire/max98363: Support MAX98363 SoundWire device
The MAX98363 smart speaker amp can be connected over SoundWire and be
configured for mainboards to use:

- Data Port 0 and Bulk Register Access is not supported
- Data Port 1 is the 32bit data input for the speaker path

The data port and audio mode properties are filled out as best as
possible with the datasheet as a reference.

The ACPI address for the codec is calculated with the information in
the codec driver combined with the devicetree.cb hierarchy where the
link and unique IDs are extracted from the device path.

For example this device is connected to master link ID 2 and has strap
settings configuring it for unique ID 0.

chip drivers/soundwire/max98363
  register "desc" = ""Left Speaker Amp""
  device generic 2.0 on end
end

This driver was tested with the rex0 reference design by booting
and disassembling the runtime SSDT to ensure that the devices have the
expected address and properties.

Device (SW20)
{
  Name (_ADR, 0x000230019F836300)  // _ADR: Address
  Name (_DDN, "Left Speaker Amp")  // _DDN: DOS Device Name
  Method (_STA, 0, NotSerialized)  // _STA: Status
  {
    Return (0x0F)
  }

  Name (_DSD, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-sw-interface-revision", 0x00010000 },
      [...]
      Package () { "mipi-sdw-source-port-list", Zero },
      Package () { "mipi-sdw-sink-port-list", 0x02 }
    },

    ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
    Package ()
    {
      Package () { "mipi-sdw-port-audio-mode-0", "MOD0" },
      Package () { "mipi-sdw-dp-1-sink-subproperties", "SNK1" }
    }
  })
  Name (MOD0, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-audio-mode-bus-frequency-configs",
        Package () { 0x00927C00, ... }
      },
      Package () { "mipi-sdw-audio-mode-sampling-frequency-configs",
        Package () { 0x3E80, ... }
      },
      [...]
    }
  })
  Name (SNK1, Package ()
  {
    ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
    Package ()
    {
      Package () { "mipi-sdw-data-port-type", Zero },
      [...]
    },

    ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
    Package ()
    {
      Package () { "mipi-sdw-port-audio-mode-0", "MOD0" }
    }
  })
}

BUG=b:269497731
TEST=Verified SSDT for SNDW in the OS

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: Ie56109d615759e3e5e32782c8782cb2f47014ec4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73278
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-25 21:21:40 +00:00
Julius Werner
69cc557cfb commonlib/bsd: Remove cb_err_t
cb_err_t was meant to be used in place of `enum cb_err` in all
situations, but the choice to use a typedef here seems to be
controversial. We should not be arbitrarily using two different
identifiers for the same thing across the codebase, so since there are
no use cases for serializing enum cb_err at the moment (which would be
the primary reason to typedef a fixed-width integer instead), remove
cb_err_t again for now.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-09 02:18:21 +00:00
Julius Werner
4757a7ea33 mipi: Make panel init callback work directly on DSI transaction types
Our MIPI panel initialization framework differentiates between DCS and
GENERIC commands, but the exact interpretation of those terms is left to
the platform drivers. In practice, the MIPI DSI transaction codes for
these are standardized and platforms always need to do the same
operation of combining the command length and transfer type into a
correct DSI protocol code. This patch factors out the various
platform-specific DSI protocol definitions into a single global one and
moves the transaction type calculation into the common panel framework.

The Qualcomm SC7180 implementation which previously only supported DCS
commands is enhanced to (hopefully? untested for now...) also support
GENERIC commands. While we're rewriting that whole section also fix some
other issues about how exactly long and short commands need to be passed
to that hardware which we identified in the meantime.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I09ade7857ca04e89d286cf538b1a5ebb1eeb8c04
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57150
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2021-09-11 01:42:47 +00:00
Julius Werner
1f84b2c025 drivers/mipi: Make orientation a property of the mainboard, not panel
It doesn't make sense to store the orientation field directly in the
panel information structure, which is supposed to be reuseable between
different boards. The thing that determines orientation is how that
panel is built into the board in question, which only the board itself
can know. The same portrait panel could be rotated left to be used as
landscape in one board and rotated right to be used as landscape in
another. This patch moves the orientation field out of the panel
structure back into the mainboards to reflect this.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: If2b716aa4dae036515730c12961fdd8a9ac34753
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57324
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-09-02 21:43:11 +00:00
Julius Werner
5ff1808f20 device/mipi: Move to drivers/mipi
Sounds like we prefer to have this under drivers/ instead of device/.
Also move all MIPI-related headers out from device/ into their own
directory.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ib3e66954b8f0cf85b28d8d186b09d7846707559d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-08-26 15:18:45 +00:00