Fix the following warning detected by checkpatch.pl:
WARNING: line over 80 characters
Changed a few comments to reduce line length. File
src/include/cpu/amd/vr.h was skipped.
TEST=Build and run on Galileo Gen2
Change-Id: I868d34132ba40c314d76c5315f620d8a44d48983
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6a566d7fbe
Original-Change-Id: Ie3c07111acc1f89923fb31135684a6d28a505b61
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18687
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454559
Fix the following error detected by checkpatch.pl:
ERROR: need consistent spacing around '-' (ctx:WxV)
TEST=Build and run on Galileo Gen2
Change-Id: I157d2d382c2dde9bad1dd0a0d7ae50dc2d13ab49
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d0f26fcea2
Original-Change-Id: Ib4c2c0c19dee842b7cd4da11a47215dc2f124374
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18686
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454558
Fix the following warning detected by checkpatch.pl:
WARNING: Avoid gcc v4.3+ binary constant extension: <...>
TEST=Build and run on Galileo Gen2
Change-Id: I5e9818d90b3f03ebd93615d76947b7f1ff486d36
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f0c8a8eb55
Original-Change-Id: Iab29c494060df3f60eff5317259e0fdbfea06f27
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18685
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454557
Fix the following error detected by checkpatch.pl:
ERROR: spaces required around that ':' (ctx:ExV)
TEST=Build and run on Galileo Gen2
Change-Id: Ic09bea8a28862c5f1837be790cddcdaa3734cc80
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 74f1dc0d38
Original-Change-Id: Idb2ea29a6c7277b319e6600e8a9d7cb8285ae5df
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18684
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454556
Fix the following error detected by checkpatch.pl:
ERROR: switch and case should be at the same indent
TEST=Build and run on Galileo Gen2
Change-Id: I28ff7be3bcc7bee821ccd24721bd7f148a9b6bb2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: db469a689b
Original-Change-Id: I92f00254c7fcb79a5ecd4ba5e19a757cfe5c11fa
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18683
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454555
Fix the following warning detected by checkpatch.pl:
WARNING: Comparisons should place the constant on the right side of the test
TEST=Build and run on Galileo Gen2
Change-Id: I1b8ba8779e6c03f6d6fa8dcfb93c977e848b36c3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6083c7ebc7
Original-Change-Id: Id790e0034ea5c926fcaef95486319d6c0c936f28
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18682
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454554
Fix the following warning detected by checkpatch.pl:
WARNING: Unnecessary space before function pointer arguments
TEST=Build and run on Galileo Gen2
Change-Id: I20aa4d7fd76c38cfbac38be5114009cf86056ccd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bab6bc4d77
Original-Change-Id: I2b56af20d5f74cc2625d3cb357fbb137bd440af0
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18660
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454551
Fix the following error detected by checkpatch.pl:
ERROR: do not use assignment in if condition
TEST=Build and run on Galileo Gen2
Change-Id: I55b19613ce00772a34855590b6736f4281cdf856
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b1260553be
Original-Change-Id: I911d528bd85afcd9f3837241494f13d1f9f283ab
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18659
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454549
Fix the following warning detected by checkpatch.pl:
WARNING: Unnecessary typecast of c90 int constant
TEST=Build and run on Galileo Gen2
Change-Id: I9d48d4e4d6793e834ad69438b2592cbc4168f573
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b7e692e016
Original-Change-Id: I137efa55e945d1315322df2a38d70716a3807a1e
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18658
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454548
Fix the following warning detected by checkpatch.pl:
WARNING: storage class should be at the beginning of the declaration
The following storage class attribute is not detected by checkpatch.py:
static cbmem_init_hook_t init_fn_ ## _ptr_ __attribute__((used,
\
section(".rodata.cbmem_init_hooks"))) = init_fn_;
The following lines generates a false positive:
(pound)define STATIC static
src/include/cpu/amd/common/cbtypes.h:60: WARNING: storage class should
be at the beginning of the declaration
typedef asmlinkage void (*smm_handler_t)(void *);
src/include/cpu/x86/smm.h:514: WARNING: storage class should be at the
beginning of the declaration
(pound)define MAYBE_STATIC static
src/include/stddef.h:34: WARNING: storage class should be at the
beginning of the declaration
TEST=Build and run on Galileo Gen2
Change-Id: I165a7e83519a6738460dbd3764b2c2dfad2bb4dd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 22c28e0f6a
Original-Change-Id: Ie087d38e6171b549b90e0b831050ac44746a1e14
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18657
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454547
Fix the following warning detected by checkpatch.pl:
WARNING: space prohibited between function name and open parenthesis '('
TEST=Build and run on Galileo Gen2
Change-Id: I1414d0522e28731ac0305deed79bf637e35767c0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 746d4afbed
Original-Change-Id: I0ac30b32bab895ca72f91720eeae5a5067327247
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18656
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454546
Fix the following errors detected by checkpatch.pl:
ERROR: "foo * bar" should be "foo *bar"
ERROR: "foo* bar" should be "foo *bar"
ERROR: "foo*bar" should be "foo *bar"
TEST=Build and run on Galileo Gen2
Change-Id: If976d346364429d93d67e8c548e470495f7ced08
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6d71a43af5
Original-Change-Id: I5a3ff8b92e3ceecb4ddf45d8840454d5310fc6b3
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18655
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/454545
BUG=b:35647967
TEST=boot from bob
Change-Id: Ib64107b17fb6e93dbe626ce92f3bc9da8b84784e
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/452284
Commit-Ready: Caesar Wang <wxt@rock-chips.com>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Fix the following warning detected by checkpatch.pl:
WARNING: braces {} are not necessary for single statement blocks
TEST=Build and run on Galileo Gen2
Change-Id: Ic05932eec8c057c0501915ed62478db487f20135
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bfdb8937b2
Original-Change-Id: I00b59f6a27c3acb393deaa763596363b7e958efd
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18654
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/453681
Fix the following errors and warning detected by checkpatch.pl:
ERROR: open brace '{' following enum go on the same line
ERROR: open brace '{' following struct go on the same line
ERROR: that open brace { should be on the previous line
WARNING: missing space after struct definition
TEST=Build and run on Galileo Gen2
Change-Id: Ieb89b152cebcf88cfde80b57bbaf9cf7130b8f04
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6625ecc344
Original-Change-Id: I856235d0cc3a3e59376df52561b17b872b3416b2
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18653
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/453680
Fix the following warning detected by checkpatch.pl:
WARNING: please, no space before tabs
TEST=Build and run on Galileo Gen2
Change-Id: Ib41ee378b8ad74a0171b12e1cee7f24b6aa20905
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 84d20d0eb3
Original-Change-Id: If60a58021d595289722d1d6064bea37b0b0bc039
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18652
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/453679
Fix the following error messages found by checkpatch.pl:
ERROR: space prohibited after that open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
TEST=Build and run on Galileo Gen2
Change-Id: I9d41c8298e84a8370767eb6d492802cf388c987e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 91d1e76fd1
Original-Change-Id: I2a9a0df640c51ff3efa83dde852dd6ff37ac3c06
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18651
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/453678
Fix the following error detected by checkpatch.pl:
ERROR: need consistent spacing around '+' (ctx:WxV)
Test: Build and run on Galileo Gen2
BUG=none
BRANCH=none
TEST=none
Change-Id: I7dd42e1dd06992896ea52664fc09859daa743bbf
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f3d07f274e
Original-Change-Id: Idd5f2a6d8a3c8db9c1a127ed75cec589929832e3
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18650
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/453374
Fix the following error found by checkpatch.pl:
ERROR: Macros with complex values should be enclosed in parentheses
False positives are detected for attribute macros. An example is:
ERROR: Macros with complex values should be enclosed in parentheses
+#define BOOT_STATE_INIT_ATTR __attribute__ ((used, section
(".bs_init")))
False positive also generated for macros for linker script files. An
example is:
ERROR: Macros with complex values should be enclosed in parentheses
+#define CBFS_CACHE(addr, size) \
+ REGION(cbfs_cache, addr, size, 4) \
+ ALIAS_REGION(cbfs_cache, preram_cbfs_cache) \
+ ALIAS_REGION(cbfs_cache, postram_cbfs_cache)
False positives generated for assembly code macros. An example is:
ERROR: Macros with complex values should be enclosed in parentheses
+#define DECLARE_OPTIONAL_REGION(name) asm (".weak _" #name ", _e" #name
)
False positive detected when macro includes multiple comma separated
values. The following code is from src/include/device/azalia_device.h:
(((codec) << 28) | (0x01720 << 8) | ((val) & 0xff)), \
(((codec) << 28) | (0x01721 << 8) | (((val) >> 8) & 0xff)), \
(((codec) << 28) | (0x01722 << 8) | (((val) >> 16) & 0xff)), \
(((codec) << 28) | (0x01723 << 8) | (((val) >> 24) & 0xff))
TEST=Build and run on Galileo Gen2
Change-Id: I55c349a221e79f80ce4e1659e3e473b4e04444b0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f00e446e74
Original-Change-Id: I6e3b6950738e6906851a172ba3a22e3d5af1e35d
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18649
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/453373
Fix the following error detected by checkpatch.py:
ERROR: space required before the open parenthesis '('
TEST=Build and run on Galileo Gen2
Change-Id: Ia1e107546eb92ada8d1e495aa24166133bb03686
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 86f60a9c8f
Original-Change-Id: I6969e63f750f327afff1a0efa1aab56d477af0df
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18645
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/453372
Decode DDR2 SPD similar to DDR3 SPD decoder to ease
readability, reduce code complexity and reduce size of
maintainable code.
Rename dimm_is_registered to spd_dimm_is_registered_ddr3 to avoid
compilation errors.
BUG=none
BRANCH=none
TEST=none
Change-Id: I2580a164627a0348da02aad6dbbe5311c442fe35
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6e53ae6f5c
Original-Change-Id: I741f0e61ab23e3999ae9e31f57228ba034c2509e
Original-Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-on: https://review.coreboot.org/18273
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/452895
cr50 by default delays nvmem commits internally from the point of
reset to accumulate change state. However, the factory process can
put a board into dev mode through the recovery screen. This state
is stored in the TPM's nvmem space. When the factory process is
complete a disable_dev_request and battery_cutoff_request is performed.
This leads to disabling the dev mode in TPM, but the battery is
subsequently cut off so the nvmem contents never stick. Therefore,
whenever antirollback_write_space_firmware() is called we know there
was a change in secdata so request cr50 to immediately enable nvmem
commits going forward. This allows state changes to happen immediately.
The fallout from this is that when secdata is changed that current
boot will take longer because every transaction that writes to TPM
nvmem space will perform a write synchronously. All subsequent boots
do not have that effect.
It should also be noted that this approach to the implementation is
a pretty severe layering violation. However, the current TPM APIs
don't lend themselves well to extending commands or re-using code
outside of the current routines which inherently assume all knowledge
of every command (in conflict with vendor commands since those are
vendor-specific by definition).
BUG=b:35775104
BRANCH=reef
TEST=Confirmed disablement of dev mode sticks in the presence of:
crossystem disable_dev_request=1; crossystem
battery_cutoff_request=1; reboot;
Change-Id: Ia2f5ec97f750570c3b16aa68b01ab1eaa94f6960
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: eeb77379e0
Original-Change-Id: I3395db9cbdfea45da1f5cb994c6570978593b944
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18681
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/452888
Fix the following error detected by checkpatch.pl:
ERROR: space prohibited after that '&' (ctx:ExW)
TEST=Build and run on Galileo Gen2
Change-Id: I2e92383212828c67c4ac71d0d11acd7e5e190ffc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 18cb7e66bd
Original-Change-Id: Ied8b4c00fc57a35ed4d649264a5ff1b8dcc6a1cd
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18648
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/452878
Fix the following error detected by checkpatch.pl:
ERROR: space required after that ',' (ctx:VxV)
TEST=Build and run on Galileo Gen2
Change-Id: I4025b28b4479350718da5403a2eb6c3dc9804fe9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ae3fd34e00
Original-Change-Id: I297bfc3d03dc95b471d3bb4b13803e81963841b5
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18647
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/452877
Fix the following error and warning detected by checkpatch.pl:
ERROR: code indent should use tabs where possible
WARNING: please, no spaces at the start of a line
TEST=Build and run on Galileo Gen2
Change-Id: Ib4ccd723c74498beef266cc13ad428cfca7ddebd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 708fc274b5
Original-Change-Id: I487771b8f4d7e104457116b772cd32df5cd721a6
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18646
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/452476
Fix the following error detected by checkpatch.py:
ERROR: Macros with multiple statements should be enclosed in a do - while loop
False positives are generated when assembly code is used in a macro. An
example is:
ERROR: Macros with multiple statements should be enclosed in a do - while loop
+#define post_code(value) \
+ movb $value, %al; \
+ outb %al, $CONFIG_POST_IO_PORT
False positives are also generated for linker script include files. An
example is:
ERROR: Macros with multiple statements should be enclosed in a do - while loop
+#define SET_COUNTER(name, addr) \
+ _ = ASSERT(. <= addr, STR(name overlaps the previous region!));
\
+ . = addr;
False positives are also generated for attribute macros. An example is:
ERROR: Macros with multiple statements should be enclosed in a do - while loop
+#define DISABLE_TRACE_ON_FUNCTION __attribute__
((no_instrument_function));
TEST=Build and run on Galileo Gen2
Change-Id: Ie8ee87e4f64e1259d085ad562c7ea3e5c281a0a7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bb4ae07417
Original-Change-Id: I88abf96579e906f6962d558a3d09907f07d00b1c
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18644
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/452475
Fix the following error detected by checkpatch.pl:
ERROR: trailing statements should be on next line
TEST=Build and run on Galileo Gen2
Change-Id: If0becceb9b15ff43fd2e5114fa71ab2c5b496c73
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e0f5dfc678
Original-Change-Id: I169f520db6f62dfea50d2bb8fb69a8e8257f86c7
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18643
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/452474
Fix warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
BRANCH=none
BUG=None
TEST=Build and run on Galileo Gen2
Change-Id: If4e006aff16981e2e9b7ac38ea2909838b2660d5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0ca2a0654c
Original-Change-Id: I23d9b4b715aa74acc387db8fb8d3c73bd5cabfaa
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18607
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/452473
Declaration of main in cpu/amd/car.h conflicts with the
definition of main required for x86/postcar.c in main_decl.h.
BUG=none
BRANCH=none
TEST=none
Change-Id: Iedbb3818068b7a24d35057537eccd385da58383b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8e1f908ce0
Original-Change-Id: I19507b89a1e2ecf88ca574c560d4a9e9a3756f37
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/18615
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/451429
The current elog implementation has two event types defined for 0xa7,
apparently the result of divergent coreboot trees on chromium where
some events were added to ARM systems but not upstreamed until later.
Fix this by moving ELOG_TYPE_THERM_TRIP to be 0xab, since the current
elog parsing code in chromium is using ELOG_TYPE_SLEEP for 0xa7.
BUG=b:35977516
TEST=check for proper "CPU Thermal Trip" event when investigating a
device that is unexpectedly powering down.
Change-Id: I3dbba826383f9dd911f910d8f9e6db7433463a10
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6cbd3980ab
Original-Change-Id: Idfa9b2322527803097f4f19f7930ccbdf2eccf35
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18579
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/451264
struct dimm_info has all the parameter types defined in stdint.h
file. So including it.
BUG=none
BRANCH=none
TEST=Build and boot KBLRVP
Change-Id: Ifca96aea794f3bdb6e150bb5e61301d0169e5e8e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c16d389363
Original-Change-Id: I707523749ecf415e993b460f9613eae7be859c34
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18471
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Philippe Mathieu-Daud <f4bug@amsat.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/449822
Using x86 RDRAND instruction, two functions are supplied to
generate a 32bit or 64bit number.
One potential usage is the sealing key generation for SGX.
BUG=chrome-os-partner:62438
BRANCH=NONE
TEST=Tested on Eve to generate a 64bit random number.
Change-Id: I5e2768ba499f1e008c9b68feae68b368cedaaa39
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 18792314d7
Original-Change-Id: I50cbeda4de17ccf2fc5efc1fe04f6b1a31ec268c
Original-Signed-off-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18362
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/445138
scan_smbus routine does not perform any smbus specific operation. Thus,
rename the routine to scan_generic_bus so that it can be used by other
buses like SPI. Add a wrapper scan_smbus to allow other users of smbus
scan to continue working as before.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: Id2b6342d96915e47c265c7984f651680632a3903
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Id: 4e08479688
Original-Change-Id: I8ca1a2b7f2906d186ec39e9223ce18b8a1f27196
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18363
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/444809
Add support for a new "SPI" device type in the devicetree to bind a
device on the SPI bus. Allow device to provide chip select number for
the device as a parameter.
Add spi_bus_operations with operation dev_to_bus which allows SoCs to
define a translation method for converting "struct device" into a unique
SPI bus number.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully.
Change-Id: Id5ef64e11a862f4075afa06a7eca25bfc84fc9aa
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Id: 7606c377f5
Original-Change-Id: I86f09516d3cddd619fef23a4659c9e4eadbcf3fa
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18340
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/444808
It's an attempt to consolidate the access code, even if there are still
multiple implementations in the code.
BUG=none
BRANCH=none
TEST=none
Change-Id: Icccf8c3113c0491ffc31d1ff04177b2116df8b17
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0e3c59e258
Original-Change-Id: I4b2b9cbc24a445f8fa4e0148f52fd15950535240
Original-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18265
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441807
Since it checks for DDR3 style checksums, it's a more appropriate name.
Also make its configuration local for a future code move.
BUG=none
BRANCH=none
TEST=none
Change-Id: I863c33342228fa73b60c31fd86d493774de1a6fd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2e08b59cdc
Original-Change-Id: I417ae165579618d9215b8ca5f0500ff9a61af42f
Original-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18264
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/441806
Add VFCT table to provide PCI Optiom Rom for
AMD graphic devices.
Useful for GNU Linux payloads and embedded dual GPU systems.
Tested on Lenovo T500 with AMD RV635 as secondary gpu.
Original Change-Id: I3b4a587c71e7165338cad3aca77ed5afa085a63c
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
BUG=none
BRANCH=none
TEST=none
Change-Id: Ic5f8c8122003d6f09b0ce2e663e31605daf7db7b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a5c2ac6256
Original-Change-Id: I4dc00005270240c048272b2e4f52ae46ba1c9422
Original-Reviewed-on: https://review.coreboot.org/18192
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/438046
It's already available in commonlib/helpers.h
BUG=none
BRANCH=none
TEST=things still build
Change-Id: Ib6e3eff82eb4fe6f3aef2065f5c2f7ada11e9e25
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427820
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
On Chrome OS devices that use TPM2 parts the platform hierarchy
is disabled by the boot loader, depthcharge. Since the bootloader
isn't involved in resuming a suspended machine there's no equivalent
action in coreboot to disable the platform hierarchy. Therefore, to
ensure consistent state in resume the platform hierarchy in the TPM2
needs to be disabled as well. For systems that resume using the
firmware the platform hierarchy is disabled when utilizing
TPM2 devices.
BUG=chrome-os-partner:61097
BRANCH=reef
TEST=Suspend and resume. Confirmed 'stop trunksd; tpmc getvf; start
trunksd' shows that phEnable is 0.
Change-Id: I144a36d8ff10ce92d3de0b26d924fd85468a9764
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f56c7787ba
Original-Change-Id: I060252f338c8fd68389273224ee58caa99881de8
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18096
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/428254
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
A VPD entry "wifi_sar" needs to be created which contains a heximal
encoded string in length of 40 bytes. get_wifi_sar_limits() function
retrieves and decodes the data from the VPD entry, which would later
be consumed by platform code.
BUG=chrome-os-partner:60821
TEST=Build and boot lars and reef
Change-Id: I73333bef1fec2769f4edb52c3e1f7262070ec5df
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ed840023a8
Original-Change-Id: I923b58a63dc1f8a7fdd685cf1c618b2fdf4e7061
Original-Signed-off-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-on: https://review.coreboot.org/17958
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/427465
cmos_post_init() is called in src/arch/x86/bootblock_simple.c, and
that function is reponsible for bootstrapping the cmos post register
contents. Without this function being called none of the cmos post
functionality works correctly. Therefore, add a call to lib/bootblock.c
which the C_ENVIRONMENT_BOOTBLOCK SoCs use.
BUG=chrome-os-partner:61546
Change-Id: I2e3519f2f3f2c28e5cba26b5811f1eb0c2a90572
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18043
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/425979
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
SPI_ATOMIC_SEQUENCING was added to accomodate spi flash controllers with
the ability to perform tx and rx of flash command and response at the
same time. Instead of introducing this notion at SPI flash driver layer,
clean up the interface to SPI used by flash.
Flash uses a command-response kind of communication. Thus, even though
SPI is duplex, flash command needs to be sent out on SPI bus and then
flash response should be received on the bus. Some specialized x86
flash controllers are capable of handling command and response in a
single transaction.
In order to support all the varied cases:
1. Add spi_xfer_vector that takes as input a vector of SPI operations
and calls back into SPI controller driver to process these operations.
2. In order to accomodate flash command-response model, use two vectors
while calling into spi_xfer_vector -- one with dout set to
non-NULL(command) and other with din set to non-NULL(response).
3. For specialized SPI flash controllers combine two successive vectors
if the transactions look like a command-response pair.
4. Provide helper functions for common cases like supporting only 2
vectors at a time, supporting n vectors at a time, default vector
operation to cycle through all SPI op vectors one by one.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17681
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I4c9e78c585ad95c40c0d5af078ff8251da286236
Reviewed-on: https://chromium-review.googlesource.com/424871
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The type3 SMBIOS table has a non-optional SKU field at the end,
which causes a parsing error when missing. Add but do not populate it.
BUG=None
BRANCH=None
TEST=None
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17851
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Change-Id: I988d0626b8680740697e1db58eb6d0b87874bfde
Reviewed-on: https://chromium-review.googlesource.com/421168
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
The cbmem_possibly_online() is a helpful construct. Therefore,
push it into cbmem.h so other users can take advantage of it.
BUG=chrome-os-partner:60592
BRANCH=reef
TEST=None
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17868
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Change-Id: If5a1c7815ed03874dcf141014b8ffefb82b7cc92
Reviewed-on: https://chromium-review.googlesource.com/421027
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
