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270 commits

Author SHA1 Message Date
Yinghai Lu
97035448f3 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1725 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-28 18:44:38 +00:00
Stefan Reinauer
a58cd524fb some more porting to the merge 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1723 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 17:27:10 +00:00
Eric Biederman
6e53f50082 sizeram removal/conversion. 
- mem.h and sizeram.h and all includes killed because the are no longer needed.
- linuxbios_table.c updated to directly look at the device tree for occupied memory areas.
- first very incomplete stab a converting the ppc code to work with the dynamic device tree
- Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources).
- First stab at Pentium-M support
- add part/init_timer.h making init_timer conditional until there is a better way of handling it.
- Converted all of the x86 sizeram to northbridge set_resources functions.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 08:53:57 +00:00
Yinghai Lu
20fc678d65 spare 4s for restart 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 02:12:22 +00:00
Yinghai Lu
eefdb03898 S2885 winbond Superio all resource set 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 00:37:30 +00:00
Yinghai Lu
9cf950ca5a s2735 minor changes 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 19:49:50 +00:00
Ronald G. Minnich
3f637906c4 added file 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1714 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 16:01:30 +00:00
Ronald G. Minnich
7ae74b40bf from Mark Wilkinson, some fixes. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 14:57:24 +00:00
Eric Biederman
8e2847c28e - For now use port 0x80 based delays in for the e7501 memory initialization. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 03:00:02 +00:00
Eric Biederman
60216355d2 - With Xeon cpus it seems best to use the tsc calibrated with timer2 as 
the time source.  The apic timer also has a variable time base.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 02:47:13 +00:00
Yinghai Lu
2560dbdd50 for S2735 support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 21:33:08 +00:00
Yinghai Lu
79cf1be9e4 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 18:49:09 +00:00
Yinghai Lu
ccf0bc01aa s2735 half update 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 18:45:36 +00:00
Stefan Reinauer
584e078231 adapt config files 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 20:52:53 +00:00
Stefan Reinauer
800a55bb5c get solo building after last infrastructure changes 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 18:51:13 +00:00
Stefan Reinauer
a49f4161f5 update failover handling of some amd64 boards 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 17:06:49 +00:00
Eric Biederman
dbec2d4090 - Bump the LinuxBIOS major version 
- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
  For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 10:44:08 +00:00
Yinghai Lu
6014983bab add Option.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 17:54:01 +00:00
Yinghai Lu
6a61d6a4ae Tyan update to work with new CPU Config 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 05:07:16 +00:00
Li-Ta Lo
812688bf3c change struct chip* to struct device* 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-19 17:49:32 +00:00
Stefan Reinauer
de24e61df7 - add support for socket 754 
- fix configuration creation for amd solo (doesn't compile yet)


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-19 10:30:32 +00:00
Eric Biederman
04da1d35d1 - Bump MAX_LINKS to 4 I have actually found an i2c bridge that needs this 
- Fix the hdama Config.lb to not longer use the link keywords oops,
  and instead to have it nest everything properly.
- Update config.g to not support the link keyword
- update config.g to not support northbridge/southbridge/cpu/pmc noise words
  we can just use chip now.
- Remove old link handling from the code
- Detect and handle duplicate paths so we generate one device with multiple links


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 19:58:35 +00:00
Eric Biederman
7003ba4a88 - First stab at running linuxbios without the old static device tree. 
Things are close but not quite there yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 06:20:29 +00:00
Eric Biederman
216525d1fd - Fix config.g and the hdama config so everthing builds again. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 02:48:37 +00:00
Eric Biederman
119e00e2e1 - Fix fat fingered merge 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 22:35:23 +00:00
Ronald G. Minnich
4b93394872 more breakage, thanks to Ron 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 21:40:58 +00:00
Eric Biederman
b78c1972fe - First pass through with with device tree enhancement merge. Most of the mechanisms should 
be in place but don't expect anything to quite work yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 20:54:17 +00:00
Ronald G. Minnich
02fa3b2743 epia-m support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-06 17:33:54 +00:00
Ronald G. Minnich
ed9f18d545 mods for i855pm that don't seem too wrong. ha! 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-09-30 22:50:13 +00:00
Ronald G. Minnich
a4779e80c3 digital logic stuff, fixes for the smbus code in 82801dbm 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-09-30 16:37:22 +00:00
Ronald G. Minnich
a26c8ef2a0 add support for ICH4. more i955pm stuff. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-09-28 20:09:06 +00:00
Stefan Reinauer
c3c27a50d9 add include to fix build 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-09-09 07:19:40 +00:00
Li-Ta Lo
7b08c116b9 removed unused code, code reformat 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-09-07 21:20:53 +00:00
Stefan Reinauer
009f87a30b build fix for epia-m so that nobody beats ron to it ;) 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-27 21:39:59 +00:00
Ronald G. Minnich
6707a45eb1 just a few changes before we hit the big fun. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1641 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-26 16:13:40 +00:00
Ronald G. Minnich
3b0096313a compiles. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-24 22:27:55 +00:00
Ronald G. Minnich
7da4d6a089 start of port of adl855pc 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-24 17:29:29 +00:00
Ronald G. Minnich
0fb38825cb fixed up tables. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1635 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-24 17:23:37 +00:00
Ronald G. Minnich
c66444c175 new mainboard 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-24 16:11:50 +00:00
Ronald G. Minnich
55a6d461a6 new mobo 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1630 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-23 20:25:17 +00:00
Stefan Reinauer
198409afe0 create some technologic systems ts530 infrastructure 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-07 19:58:46 +00:00
Stefan Reinauer
40ab2d1213 add Config file for ts5300 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-08-07 19:34:46 +00:00
Li-Ta Lo
4c5060dc2b move default_resource_map to its own file 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-07-08 16:59:06 +00:00
Li-Ta Lo
f76a613a9a code reformat, removed unused code 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1622 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-07-08 16:57:43 +00:00
Yinghai Lu
70093f7875 Intel E7501 P64H2 ICH5R support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-07-01 03:55:03 +00:00
Stefan Reinauer
4a3bb76aa8 commit initial qemu support (see http://fabrice.bellard.free.fr/qemu/) 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-06-28 11:57:31 +00:00
David W. Hendricks
c7d4db7ff1 Now it should build on the first try :) 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-06-16 15:32:43 +00:00
Li-Ta Lo
99efe80122 add support for AMD Serenade mainboard, why we have phantom devices here? 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-06-15 23:55:55 +00:00
Li-Ta Lo
6ae2ac3739 add support for AMD Serenade mainboard, why we have phantom devices here? 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-06-15 23:37:34 +00:00
Li-Ta Lo
9b1a2ff96f code reformat, is the pirq table correct? 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-06-15 03:00:35 +00:00