board porter: printk should always be available in CAR mode.
Also drop CONFIG_USE_INIT, it's only been selected on one ASROCK board
but it's not been used there. Very odd.
There is one usage of CONFIG_USE_INIT which was always off in
src/cpu/intel/car/cache_as_ram.inc and we have to figure out what to do with
those few lines.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Also clean up gx2def.h and geode_post_code.h a little.
abuild tested and boot tested on a Wyse S50.
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This resolves problems with terminated DRAM modules.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Acked-by: Roland G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5563 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
also the GCC generated code and it looks all right. Please test on some
multicore CPU.
I added the "memory" clobber to read_cr0 / write_cr0 function as it is in Linux
Kernel. Seems that if this is missing, GCC is too smart and messes the order
of reads/writes to CR0 (not tested if really a problem here, but be safe for
future users of this function ;)
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5562 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
romstage.c files in mainboards.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
geode lx and amd opteron don't use this yet.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
(which could at some time hold global post code definitions, too)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5498 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* integrate vsm init into normal x86.c code (so it can run above 1M)
* call void main(unsigned long bist) except void cache_as_ram_main(void)
on Geode LX (as we do on almost all other platforms now)
* Unify Geode LX MSR setup (will bring most non-working LX targets back
to life)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Only some assembler files still have \r\n ... Can we move that part to C
completely?
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Only have multicore.h for both of them.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
appropriate. Also, factor out post_code() for __PRE_RAM__ code and drop it from
some mainboards.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Replace set_init_ram_access with the call to set_var_mtrr.
Remove unused #include statments.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- allow northbridge and cpu handlers, too
- support for older rev 2 cpus
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5141 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- drop include/part and move files to include/
- get rid lots of warnings
- make resource allocator happy with w83627thg
- trivial cbmem resume fix
- fix payload and log level settings in abuild
- fix kontron mptable for virtual wire mode
- drop some dead includes and dead code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- Consistently use the same wording and formatting for all license headers.
- Remove useless whitespace, add missing whitespace, fix indentation.
- Add missing "This file is part of the coreboot project." where needed.
- Change "(C) Copyright John Doe" to "Copyright (C) John Doe" for consistency.
- Add some missing "(C)" strings and copyright years where needed.
- Move random comments and file descriptions out of the license header.
- Drop incorrect file descriptions completely (e.g. lpc47m10x/Makefile.inc).
There should be no changes in _content_ of the license headers, if you spot
such changes that's a bug, please report!
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them."
__PRE_RAM__ means "Use simpler versions of functions, and no device tree."
There are probably some places where both are tested, but only one is needed.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Declare superio functions to be static and remove duplicates.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
TODO
- x86emu need (imo) some common header with prototypes at least
- clog2, ulzma, hardwaremain prototypes added by this patch probably should
be moved to some header too.
- in src/devices/device_util.c prototype is before function because seems,
it is used only within same file, if not it should be moved to debug
section of prototypes in include/device/device.h
Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Marco Schmidt <mashpb@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Use the (almost) same strict CFLAGS in v2 that we use on v3. And fix a few
include files and missing prototypes. Also, fix up the Config-abuild.lb files
to properly work for cross compiling.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
sense, too). Have one u64 instead of three.
In order to use the old bios emulator, you have to do nothing. (Default, if
CONFIG_PCI_ROM_RUN is enabled)
In order to use yabel in your target, you need to add the following lines to
your config:
uses CONFIG_PCI_OPTION_ROM_RUN_YABEL
default CONFIG_PCI_OPTION_ROM_RUN_YABEL=1
In order to use vm86 in your target, you need to add the following lines to
your config:
uses CONFIG_PCI_OPTION_ROM_RUN_VM86
default CONFIG_PCI_OPTION_ROM_RUN_VM86=1
Note: vm86 only works on platforms with _RAMBASE in the lower megabyte.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3965 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Bellongs to r3947
Following patch adds dynamically generated P-States infrastructure as well as
M2V-MX SE as example how to do that. It is based on AMD code and mine code for
ACPI generation.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Robert Millan <rmh@aybabtu.com>
Acked-by: Jordan Crouse <jordan@cosmicpneguin.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This includes an early SMI handler.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
CONFIG_AP_IN_SIPI_WAIT flag. Newer Intel CPUs need this to operate with
multiple cores.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3465 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
code is changed.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
