Commit graph

24 commits

Author SHA1 Message Date
Maxim Polyakov
4ff7a4a5a0 intelp2m/patform/ebg: Add unit tests
1) Siding one in nibble: DW = 0001 0001 0001 0001
                                <-   <-   <-   <-
2) Siding zero in nibble: DW = 1110 1110 1110 1110
                                 <-   <-   <-   <-
3) Siding one one in nibble: DW = 0011 0011 0011 0011
                                    <-   <-   <-   <-

Change-Id: I10c313aa543a4e07c6685a7ae4e9d665eef7bf75
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2025-01-17 04:25:06 +00:00
Maxim Polyakov
2c747794cf intelp2m/patform/mtl: Add unit tests
1) Siding one in nibble: DW = 0001 0001 0001 0001
                                <-   <-   <-   <-
2) Siding zero in nibble: DW = 1110 1110 1110 1110
                                 <-   <-   <-   <-
3) Siding one one in nibble: DW = 0011 0011 0011 0011
                                    <-   <-   <-   <-

Change-Id: I5965f2362626c0ca1f51bf5f4dbe275b76c392ea
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85551
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-01-17 04:25:02 +00:00
Maxim Polyakov
e28ba75437 intelp2m/patform/adl: Add unit tests
1) Siding one in nibble: DW = 0001 0001 0001 0001
                                <-   <-   <-   <-
2) Siding zero in nibble: DW = 1110 1110 1110 1110
                                 <-   <-   <-   <-
3) Siding one one in nibble: DW = 0011 0011 0011 0011
                                    <-   <-   <-   <-

Change-Id: I1ef3e9eeccdde8824a921ece02edbc4ba1187a00
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85550
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-01-17 04:24:58 +00:00
Maxim Polyakov
7408c2757e intelp2m/patform/tgl: Add unit tests
1) Siding one in nibble: DW = 0001 0001 0001 0001
                                <-   <-   <-   <-
2) Siding zero in nibble: DW = 1110 1110 1110 1110
                                 <-   <-   <-   <-
3) Siding one one in nibble: DW = 0011 0011 0011 0011
                                        <-   <-   <-   <-

Change-Id: I637ee4769b13199edadd10afbbd12f9fc37fec81
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85607
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2025-01-17 04:24:53 +00:00
Maxim Polyakov
1edfffbe84 intelp2m/patform/jsl: Add unit tests
1) Siding one in nibble: DW = 0001 0001 0001 0001
                                <-   <-   <-   <-
2) Siding zero in nibble: DW = 1110 1110 1110 1110
                                 <-   <-   <-   <-
3) Siding one one in nibble: DW = 0011 0011 0011 0011
                                    <-   <-   <-   <-

Change-Id: Ie2acd675a6239768d23593cd5ca273b56480a890
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85549
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-01-17 04:24:38 +00:00
Maxim Polyakov
244fd406e9 intelp2m/patform/cnl: Add unit tests
1) Siding one in nibble: DW = 0001 0001 0001 0001
                                <-   <-   <-   <-
2) Siding zero in nibble: DW = 1110 1110 1110 1110
                                 <-   <-   <-   <-
3) Siding one one in nibble: DW = 0011 0011 0011 0011
                                    <-   <-   <-   <-

Change-Id: Icb0b6506a07b96903e6bc7994e5f97d483d0a330
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85548
Reviewed-by: Daniel Maslowski <info@orangecms.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2025-01-17 04:24:25 +00:00
Maxim Polyakov
1b9c312273 intelp2m/patform/sunrise: Add unit tests
- The generated map of long and short macros should correspond to the
  reference ones for all pads (INTEL-SUNRISE-PCH/PAD-MAP). The test
  suite is based on the generated macros of a real platform.
- generated field macros should correspond to the RO_FIELDS mask
  (INTEL-SUNRISE-PCH/MASK);
- macros generated from the zero values bits of the DW registers should
  correspond to the reference ones (INTEL-SUNRISE-PCH/EMRTY).

Use the following command in the console to run all the tests in the
project:

make test

Change-Id: I15c7483f120a330849d4bad036427be205b0911c
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67132
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2024-12-04 18:16:16 +00:00
Maxim Polyakov
2394795279 intelp2m/patform/lewisburg: Add unit tests
- The generated map of long and short macros should correspond to the
  reference ones for all pads (INTEL-LEWISBURG-PCH/PAD-MAP). The test
  suite is based on the generated macros of a real platform.
- generated field macros should correspond to the RO_FIELDS mask
  (INTEL-LEWISBURG-PCH/MASK);
- macros generated from the zero values bits of the DW registers should
  correspond to the reference ones (INTEL-LEWISBURG-PCH/EMRTY).

Change-Id: Iec18462be8428c3f37d546332211a730ee589a2d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67133
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2024-12-04 18:16:00 +00:00
Maxim Polyakov
bce3363412 intelp2m/patform/apollolake: Add unit tests
- The generated map of long and short macros should correspond to
  the reference ones for all pads (INTEL-APOLLO-PCH/PAD-MAP). The
  test suite is based on the generated macros of a real platform.
- generated field macros should correspond to the RO_FIELDS mask
  (INTEL-APOLLO-PCH/MASK);
- macros generated from the zero values bits of the DW registers
  should correspond to the reference ones (INTEL-APOLLO-PCH/EMRTY).

Change-Id: I1c47edb31d24930068486c74147c5fbc9b18b4b6
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67134
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-12-04 18:15:44 +00:00
Maxim Polyakov
a022d88b6f util/intelp2m/platforms: Fix DW register number before clear it
This error does not affect the generated files as the tests are
running [1, 2, 3]. However, this once again confirms the need to
work on updating the utility.

[1] CB:67132
[2] CB:67133
[3] CB:67134

Change-Id: I91e74d65977bd5e10589530258d1709ea33f1af5
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83002
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-06-21 16:06:41 +00:00
Fabian Meyer
92e372bb35 util/intelp2m: Add support for Emmitsburg macro generation
Test: Generated GPIO for ASRock Rack SPC741D8-2L2T/BCM.

Change-Id: Ib7ded47fb1c0b87ebb3cecaf3e41319ac552b797
Signed-off-by: Fabian Meyer <fabian.meyer@student.kit.edu>
Co-authored-by: Yussuf Khalil <yussuf.khalil@kit.edu>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82204
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim <max.senia.poliak@gmail.com>
2024-06-17 14:30:28 +00:00
Filip Lewiński
7898594b7c util/intelp2m: add Meteor Lake support
Enables parsing Meteor Lake inteltool output into gpio.h pad macros.

Change-Id: Iaebd51d587507e68c6f263b92dc61cb6c0411bf8
Signed-off-by: Filip Lewiński <filip.lewinski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81916
Reviewed-by: Maxim <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Kopeć <michal.kopec@3mdeb.com>
2024-05-12 18:53:31 +00:00
Alicja Michalska
c45d5c8c6b util/intelp2m: Add support for TigerLake-H SoC
Add support for TigerLake Halo SoC, based on CNL profile.

Test: Convert GPIO dump from inteltool into coreboot macros for
out-of-tree TGL board.

Change-Id: I26eff225c2045edfe5836283be7b4c63f6b405e8
Signed-off-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim <max.senia.poliak@gmail.com>
2024-04-04 20:21:08 +00:00
Jonathon Hall
1af3e3c5f8 util/intelp2m: Support Jasper Lake
Support generating Jasper Lake GPIO configuration from inteltool logs

Change-Id: I519d27e0c91c8d9159224d9bc1c6e49c83270b7a
Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78093
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim <max.senia.poliak@gmail.com>
2023-10-02 16:23:31 +00:00
Maxim Polyakov
593b0f1f23 intelp2m: Add Go Managing Dependencies System support
Add go.mod containing the full name of the project according to the
docs [1]: review.coreboot.org/coreboot.git/util/intelp2m, and also,
based on this, rename the internal packages to point to the absolute
path. This will allow Go Managing Dependencies System to integrate
packages from intelp2m to third-party Go written on the Go language [1].
This also requires fixing the Golang compiler version in go.mod: use
go1.18 [2], the latest up-to-date version.

[1] https://web.archive.org/web/20220910100342/https://go.dev/doc/modules/managing-dependencies
[2] https://web.archive.org/web/20220910100206/https://tip.golang.org/doc/go1.18

[ TEST ]
1) Import the coreboot project into some go project:

$cd path/to/go-project
$go get review.coreboot.org/coreboot.git
go: downloading review.coreboot.org/coreboot.git v0.0.0-20220903004133
-39914a50ae
go: added review.coreboot.org/coreboot.git v0.0.0-20220903004133
-39914a50ae

Thus, 'go get' correctly downloaded the contents of the repository.

2) Import intelp2m:

$cd path/to/go-project
$go get review.coreboot.org/coreboot.git/util/intelp2m
review.coreboot.org/coreboot.git/util/intelp2m imports
	./config: "./config" is relative, but relative import paths are
not supported in module mode
review.coreboot.org/coreboot.git/util/intelp2m imports
	./parser: "./parser" is relative, but relative import paths are
not supported in module mode

Thus, the problem is in the package names, but after this patch, the
import should be without errors.

3) Import a repository with an incorrect url:

$cd path/to/go-project
$go get review.coreboot.org/coreboot/test
go: unrecognized import path "review.coreboot.org/coreboot/test":
reading https://review.coreboot.org/coreboot/test?go-get=1:
404 Not Found

This has not happened in previous cases.

Change-Id: I12efae31227129b8c884af10fb233f398c4094e7
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2022-09-12 12:55:05 +00:00
Michał Kopeć
d3b550d47c util/intelp2m: Add support for Alder Lake macro generation
Add support for Alder Lake as a separate parsing profile, copying the
existing 'Cannon' profile and adjusting for differences in reset mapping
and GPIO macro generation.

TEST=Generate GPIO macros for MSI PRO Z690-A

Change-Id: I5871394bcb0636c2c803607ffb129441aa934417
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
2022-05-25 23:25:25 +00:00
Maxim Polyakov
8b35851e4c util/intelp2m: use import once for all included modules
There is no need to repeat "import" for each module in GoLang. Use
this keyword only once in each file for code cleanliness.

Change-Id: Ibb24fafd409b31b174946a39ca1f810d59b87e76
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55985
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-07-02 07:48:58 +00:00
Benjamin Doron
1bb640dfc0 util/intelp2m: Clean up SCI, SMI macro generation and update comments
Simplify macro generation and fix up "DEEP,EDGE_SINGLE" bug introduced
by commit 7bb756f (util/intelp2m: Update macros). Also update legacy
macro comments.

Change-Id: Ie49874d4abbdc7d1a18d63a62ccbce970ce78233
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47314
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-16 11:08:27 +00:00
Benjamin Doron
7bb756fad7 util/intelp2m: Update macros
Change-Id: Ia0a7dea89fdb69e01f0abe577488f26a5d2bd6ed
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-11-04 21:14:58 +00:00
Maxim Polyakov
726282b44f util/intelp2m: Update output information format in the comments
Update the information format in the comments above the macros in the
generated gpio.h file:

PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE,
DISPUPD), /* LPSS_UART0_TXD */ -->(i)

/* GPIO_39 - LPSS_UART0_TXD */ --> (ii)
/* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii)
/* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii)
/* _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) |
PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), */ --> (iiii)
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE,
DISPUPD),

Also, in the case of field macros:

/* GPIO_39 - LPSS_UART0_TXD */ --> (ii)
/* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii)
/* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii)
/* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE,
DISPUPD), */ --> (iiii)
PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF),
PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)),

By default, if do not use the -i... option, then additional information
in comments will not be generated.

TEST:
git clone https://github.com/maxpoliak/inteltool-examples.git test
./intelp2m -n -file test/inteltool-asrock-h110m-stx.log
./intelp2m -fld cb -file test/inteltool-asrock-h110m-stx.log
./intelp2m -fld fsp -file test/inteltool-asrock-h110m-stx.log
./intelp2m -fld raw -file test/inteltool-asrock-h110m-stx.log

Before and after (now with -i key) the patch, gpio.h is no different.

Change-Id: I760f4aadece786ea455fb7569f42e06fefce2b61
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45168
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-12 08:43:14 +00:00
Maxim Polyakov
c65f1f95dc util/intelp2m/apl: Remove unused plat-spec function
Change-Id: I42074387a08b66b038ad2939f31be263eaa3af0e
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44473
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-28 15:44:23 +00:00
Maxim Polyakov
0a6f82835e util/intelp2m: Check keywords in common code
TEST = ./intelp2m -n -file inteltool.log;
       ./intelp2m -fld cb -file inteltool.log;
       ./intelp2m -fld fsp -file inteltool.log;
       ./intelp2m -fld raw -file inteltool.log.
       Before and after the patch, gpio.h is no different.

Change-Id: I8af28960e41fcb97f03fe97c42cdddde07b3615a
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45167
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2020-09-21 08:07:26 +00:00
Matt DeVillier
5eeead2d73 util/intelp2m: Add support for Cannonlake-LP SoCs
Add support for Cannonlake-LP SoCs (Whiskeylake-U,
Coffeelake-U, Cometlake-U) as a separate parsing profile,
copying the existing 'Sunrise' profile and adjusting for differences
in reset mapping and GPIO macro generation

Test: convert inteltool GPIO log dump into coreboot macros for
an out-of-tree CML-U board.

Change-Id: I86296697ee892af7aa0818fb608b6d68fad2f307
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
2020-08-18 08:49:27 +00:00
Maxim Polyakov
82ec61e9d7 util/intelp2m: Add Intel Pad to Macro utility
This patch adds a new utility for converting a pad configuration from
the inteltool dump to the PAD_CFG_*() macros [1] for coreboot and GPIO
config data structures for FSP/sdk2-platforms/slimbootloader [2,3].
Mirror: https://github.com/maxpoliak/pch-pads-parser.git

[1] src/soc/intel/common/block/include/intelblocks/gpio_defs.h
[2] https://slimbootloader.github.io/tools/index.html#gpio-tool
[3] 3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/GpioSampleDef.h

Change-Id: If3e3b523c4f63dc2f91e9ccd16934e3a1b6e21fa
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35643
Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-28 22:06:02 +00:00