Commit graph

5 commits

Author SHA1 Message Date
Eric W. Biederman
2beb0a1bcc - Updates for the supermicro p4dc6 motherboard
- Code to initialize sdram from C on the l440gx
- cache as ram code fro the p6 it works except conflict misses occur
  with addresses that are not cached so writing to ram does not work.
  Which makes it to brittle to count on.
- Initial implementation of a fallback booting scheme where we can
  have two copies of linuxbios in rom at once.
- Movement of 32 bit entry code from entry16.inc to entry32.inc
- Update of all config files so they now also include entry32.inc
- Fix for start_stop.c & entry16.inc so I can fairly arbitrarily relocate
  the 16bit entry code in SMP.
- A small number of fixes for warnings
2001-11-27 19:29:59 +00:00
Eric W. Biederman
a8151ba2cd Initial checkin for supermicro p4dc6
This also includes a bunch of my pending work including
- Updated serial code so we can compile in different serial port speeds
- Updates to the build system so that:
  - Makefile.settings holds all of the settings of the config variables
  - ldoptions and cpuflags are generated automatically with perl scripts
  - src/config/Config holds all of the architecture neutral make file settings
- Initial work on the P4 including how to use cache as ram
- Update to the ioapic code for the P4 because it delivers irqs on the system
  bus instead of an out of band bus
- Updated version of printf that doesn't need an intermediate buffer
  - logbuf_subr now handles the case when we want to use a log buffer
- video_subr handles the preliminary code for writing to a video device.
- Pending changes for the L440GX are merged in as well (hopefully I haven't
  messed then up since they were written).
2001-11-03 02:11:49 +00:00
Li-Ta Lo
69f93c224c add more
#ifndef lint
static char rcsid[] = "$Id:$";
#endif

to *.c source
2000-12-02 03:51:28 +00:00
Ronald G. Minnich
787deb4ae4 Fixes so we don't use any of the standard include paths 2000-10-17 22:58:51 +00:00
Ronald G. Minnich
96fa389618 Building the new src tree 2000-10-16 03:03:03 +00:00