UPSTREAM: soc/intel/common: Make infrastructure ready for Intel common code

Select all Kconfig belongs into Intel SoC Family block/ips common
code model and include required header.h file.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ic42935d94acc74a950076dce4538e360433aed20
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9a0245a84d
Original-Change-Id: Idbce59a57533dbeb9ccfadca966c3d7560537fa0
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18377
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/451259

src/soc/intel/common/Kconfig

@@ -5,6 +5,10 @@ config SOC_INTEL_COMMON
 
 if SOC_INTEL_COMMON
 
+comment "Intel SoC Common Code"
+source "src/soc/intel/common/basecode/Kconfig"
+source "src/soc/intel/common/block/Kconfig"
+
 config CACHE_MRC_SETTINGS
 	bool "Save cached MRC settings"
 	default n

src/soc/intel/common/Makefile.inc

@@ -1,5 +1,8 @@
 ifeq ($(CONFIG_SOC_INTEL_COMMON),y)
 
+subdirs-y += basecode/
+subdirs-y += block/
+
 bootblock-y += util.c
 
 verstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c

src/soc/intel/common/block/Kconfig

@@ -0,0 +1,11 @@
+config SOC_INTEL_COMMON_BLOCK
+	bool
+	help
+	  SoC driver for intel common IP code
+
+if SOC_INTEL_COMMON_BLOCK
+
+comment "Intel SoC Common IP Code"
+source "src/soc/intel/common/block/*/Kconfig"
+
+endif

src/soc/intel/common/block/Makefile.inc

@@ -0,0 +1,7 @@
+ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK),y)
+
+subdirs-y += ./*
+
+CPPFLAGS_common += -I$(src)/soc/intel/common/block/include/
+
+endif