From ff5220e14fcac3e8e469a5873317093347169a26 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Mon, 17 Apr 2017 00:53:10 +0200 Subject: [PATCH] UPSTREAM: console: Add convenient debug level macros for raminit BUG=none BRANCH=none TEST=none Change-Id: I0441ce20bc4c14d9d367eb76ecd337adf3b92c0a Signed-off-by: Patrick Georgi Original-Commit-Id: 54235ca1b765605be36a65cefabc958cde1c206a Original-Change-Id: Ib92550fe755293ce8c65edf59242a2b04327128e Original-Signed-off-by: Nico Huber Original-Reviewed-on: https://review.coreboot.org/19332 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Kysti Mlkki Original-Reviewed-by: Paul Menzel Original-Reviewed-by: Philippe Mathieu-Daud Reviewed-on: https://chromium-review.googlesource.com/482964 --- src/include/console/console.h | 3 +++ src/northbridge/intel/gm45/gm45.h | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/include/console/console.h b/src/include/console/console.h index 3100ae2d55..d89d7471ca 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -22,6 +22,9 @@ #include #include +#define RAM_DEBUG (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER) +#define RAM_SPEW (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) ? BIOS_SPEW : BIOS_NEVER) + #ifndef __ROMCC__ void post_code(u8 value); diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index 60e9574459..258809fe8a 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -443,7 +443,5 @@ struct acpi_rsdp; unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp); #endif -#define RAM_DEBUG (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER) - #endif /* !__ACPI__ */ #endif /* __NORTHBRIDGE_INTEL_GM45_GM45_H__ */