diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
index 61794312ec..816f378961 100644
--- a/src/mainboard/google/auron/devicetree.cb
+++ b/src/mainboard/google/auron/devicetree.cb
@@ -43,7 +43,7 @@ chip soc/intel/broadwell
 	register "gpe0_en_4" = "0x00000000"
 
 	register "sata_port_map" = "0x1"
-	register "sio_acpi_mode" = "0"
+	register "sio_acpi_mode" = "1"
 
 	# DTLE DATA / EDGE values
 	register "sata_port0_gen3_dtle" = "0x5"