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mb/google/fatcat: Increase PL4 power limits for PTL-H variants

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Increase PL4 power limit values for all Intel PTL-H variants on Fatcat
from 50000 to 65000 to ensure successful boot and adequate performance
with 45W and 65W USB-C adapters. This prevents system bottlenecks when
using lower-wattage power supplies.

BUG=b:395130929
TEST=Verified successful boot with 45W and 65W USB-C travel adapters,
as well as 96W/106W USB-C adapters.

Change-Id: I6073e748e9f8c7317f0ad9a1193699e34703bdba
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86388
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2025-02-13 10:09:32 +05:30
commit ff353fe88d
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c
View file

@ -16,7 +16,7 @@ const struct cpu_tdp_power_limits power_optimized_limits[] = {
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 50000 /* TODO: needs fine tuning */
.pl4_power = 65000
},
{
.mch_id = PCI_DID_INTEL_PTL_H_ID_2,
@ -26,7 +26,7 @@ const struct cpu_tdp_power_limits power_optimized_limits[] = {
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 50000 /* TODO: needs fine tuning */
.pl4_power = 65000
},
{
.mch_id = PCI_DID_INTEL_PTL_H_ID_3,
@ -36,7 +36,7 @@ const struct cpu_tdp_power_limits power_optimized_limits[] = {
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 50000 /* TODO: needs fine tuning */
.pl4_power = 65000
},
{
.mch_id = PCI_DID_INTEL_PTL_H_ID_4,
@ -46,7 +46,7 @@ const struct cpu_tdp_power_limits power_optimized_limits[] = {
.pl1_max_power = 25000,
.pl2_min_power = 50000,
.pl2_max_power = 50000,
.pl4_power = 50000 /* TODO: needs fine tuning */
.pl4_power = 65000
},
};