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AMD F14 southbridge update

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This change adds the southbridge related code to support
the update of the AMD Family14 cpus to the rec C0 level.
Some of the changes reside in mainboard folders but they
reference changed files in the southbridge folder so they
are included herein.

Change-Id: Ib7786f9f697eaf0bf8abd9140c4dd0c42927ec7e
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Signed-off-by: Kerry She <kerry.she@amd.com>
Signed-off-by: Kerry She <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/135
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Kerry She 2011-08-18 18:03:44 +08:00 • committed by Stefan Reinauer
commit feed329a0c
65 changed files with 1307 additions and 989 deletions
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3
src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
View file

@ -113,5 +113,6 @@ unsigned int ReadIo32(IN unsigned short Address);
void WriteIo8(IN unsigned short Address, IN unsigned char Data);
void WriteIo16(IN unsigned short Address, IN unsigned short Data);
void WriteIo32(IN unsigned short Address, IN unsigned int Data);
void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
//void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
void CpuidRead(unsigned int CpuidFcnAddress, CPUID_DATA *Value);
unsigned char ReadNumberOfCpuCores(void);

4
src/vendorcode/amd/cimx/sb800/OEM.h
View file

@ -30,7 +30,9 @@
*
*/
#define BIOS_SIZE 0x04 //04 - 1MB
#ifndef BIOS_SIZE
#define BIOS_SIZE 0x04 //04 - 1MB
#endif
#define LEGACY_FREE 0x00
//#define ACPI_SLEEP_TRAP 0x01
//#define SPREAD_SPECTRUM_EPROM_LOAD 0x01

4
src/vendorcode/amd/cimx/sb900/Oem.h
View file

@ -27,7 +27,9 @@
;
;*********************************************************************************/
#define BIOS_SIZE 0x04 //04 - 1MB
#ifndef BIOS_SIZE
#define BIOS_SIZE 0x04 //04 - 1MB
#endif
#define LEGACY_FREE 0x00
#define ACPI_SLEEP_TRAP 0x01
//#define SPREAD_SPECTRUM_EPROM_LOAD 0x01