erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

mb/google/dedede/var/beadrix: Add LTE only daughterboard support

Browse source 
Due to beadrix DB has C1 port before, and add FW_CONFIG without C1 port for LTE sku.

BUG=b:364431483
BRANCH=firmware-dedede-13606.B
TEST=emerge-dedede coreboot chromeos-bootimage

Set fw config to DB_PORTS_LTE and check
1.fw_config match found: DB_PORTS=DB_PORTS_LTE <= show LTE present message
2.USB3 port 3: enabled 1 <= LTE port enable

Change-Id: Ica5a2d6e19421b132a0bdbad77806a17e2c1ce69
Signed-off-by: Kevin Yang <kevin.yang@ecs.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84232
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Kevin Yang 2024-09-04 13:19:34 +08:00 • committed by Felix Held
commit fe2384a95c
2 changed files with 4 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

3
src/mainboard/google/dedede/variants/beadrix/gpio.c
View file

@ -122,7 +122,8 @@ const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
static void fw_config_handle(void *unused)
{
if (!fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1C_LTE)))
if (!fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1C_LTE)) &&
!fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_LTE)))
gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads));
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);

2
src/mainboard/google/dedede/variants/beadrix/overridetree.cb
View file

@ -141,6 +141,7 @@ chip soc/intel/jasperlake
register "enable_delay_ms" = "20"
device usb 3.3 on
probe DB_PORTS DB_PORTS_1C_LTE
probe DB_PORTS DB_PORTS_LTE
end
end
end
@ -239,6 +240,7 @@ chip soc/intel/jasperlake
register "reg_irq_cfg2" = "0x00"
device i2c 28 on
probe DB_PORTS DB_PORTS_1C_LTE
probe DB_PORTS DB_PORTS_LTE
end
end
end # I2C 5