diff --git a/Kconfig b/Kconfig
index 10c4b389a1..e79ef84584 100644
--- a/Kconfig
+++ b/Kconfig
@@ -94,7 +94,6 @@ config SUPERIO_ITE_IT8716F
 	boolean
 
 # Source all northbridge/southbridge/superio Kconfig files:
-source northbridge/intel/i440bxemulation/Kconfig
 
 menu "Payload"
 
diff --git a/mainboard/emulation/qemu-x86/defconfig b/mainboard/emulation/qemu-x86/defconfig
index ab6a627548..747dc37597 100644
--- a/mainboard/emulation/qemu-x86/defconfig
+++ b/mainboard/emulation/qemu-x86/defconfig
@@ -83,7 +83,6 @@ CONFIG_PCI_OPTION_ROM_RUN_VM86=y
 CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION=y
 CONFIG_SOUTHBRIDGE_INTEL_I82371EB=y
 CONFIG_SUPERIO_WINBOND_W83627HF=y
-CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE=32
 
 #
 # Payload
diff --git a/mainboard/pcengines/alix1c/defconfig b/mainboard/pcengines/alix1c/defconfig
index 122fefd526..3dbe2ce439 100644
--- a/mainboard/pcengines/alix1c/defconfig
+++ b/mainboard/pcengines/alix1c/defconfig
@@ -91,7 +91,6 @@ CONFIG_PCI_OPTION_ROM_RUN_VM86=y
 CONFIG_NORTHBRIDGE_AMD_GEODELX=y
 CONFIG_SOUTHBRIDGE_AMD_CS5536=y
 CONFIG_SUPERIO_WINBOND_W83627HF=y
-CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE=32
 
 #
 # Payload
diff --git a/mainboard/pcengines/alix2c3/defconfig b/mainboard/pcengines/alix2c3/defconfig
index cf6a1ffcfb..c0ff7ba613 100644
--- a/mainboard/pcengines/alix2c3/defconfig
+++ b/mainboard/pcengines/alix2c3/defconfig
@@ -84,7 +84,6 @@ CONFIG_PCI_OPTION_ROM_RUN_VM86=y
 #
 CONFIG_NORTHBRIDGE_AMD_GEODELX=y
 CONFIG_SOUTHBRIDGE_AMD_CS5536=y
-CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE=32
 
 #
 # Payload
diff --git a/northbridge/intel/i440bxemulation/Kconfig b/northbridge/intel/i440bxemulation/Kconfig
deleted file mode 100644
index 68ba1324b2..0000000000
--- a/northbridge/intel/i440bxemulation/Kconfig
+++ /dev/null
@@ -1,27 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
-## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
-config NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE
-	int
-	default 32 # Mbytes
-	help
-	  This is the default RAM size of emulation.
-
diff --git a/northbridge/intel/i440bxemulation/i440bx.c b/northbridge/intel/i440bxemulation/i440bx.c
index 4a4569aaed..2650684b24 100644
--- a/northbridge/intel/i440bxemulation/i440bx.c
+++ b/northbridge/intel/i440bxemulation/i440bx.c
@@ -56,9 +56,12 @@ static void pci_domain_set_resources(struct device *dev)
 	struct northbridge_intel_i440bxemulation_domain_config *device_configuration =
 	    dev->device_configuration;
 	tolmk = device_configuration->ramsize * 1024;
+	printk(BIOS_WARNING, "Ignoring chipset specified RAM size. Using dts "
+		"settings of %d kB instead.\n", tolmk);
 	mc_dev = dev->link[0].children;
 	if (mc_dev) {
 		idx = 10;
+#warning FIXME: We have no memory hole between 640 and 768 kB
 		ram_resource(dev, idx++, 0, tolmk);
 	}
 	phase4_assign_resources(&dev->link[0]);