More boards in kconfig, and moved -O2 flag for romcc into
ROMCCFLAGS, so boards can override it where necessary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4730 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Patrick Georgi
parent
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33 changed files with 872 additions and 26 deletions
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#
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choice
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prompt "Mainboard model"
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depends on VENDOR_NVIDIA
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source "src/mainboard/nvidia/l1_2pvv/Kconfig"
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endchoice
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148
src/mainboard/nvidia/l1_2pvv/Kconfig
Normal file
148
src/mainboard/nvidia/l1_2pvv/Kconfig
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config BOARD_NVIDIA_L1_2PVV
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bool "L1 2PVV"
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select ARCH_X86
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select CPU_AMD_K8
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select CPU_AMD_SOCKET_F
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_NVIDIA_MCP55
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select SUPERIO_WINBOND_W83627EHG
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select PIRQ_TABLE
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select HAVE_HIGH_TABLES
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select IOAPIC
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select MEM_TRAIN_SEQ
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select K8_REV_F_SUPPORT
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config MAINBOARD_DIR
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string
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default nvidia/l1_2pvv
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depends on BOARD_NVIDIA_L1_2PVV
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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depends on BOARD_NVIDIA_L1_2PVV
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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depends on BOARD_NVIDIA_L1_2PVV
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x01000
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depends on BOARD_NVIDIA_L1_2PVV
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config APIC_ID_OFFSET
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hex
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default 16
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depends on BOARD_NVIDIA_L1_2PVV
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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depends on BOARD_NVIDIA_L1_2PVV
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config LB_CKS_RANGE_START
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int
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default 49
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depends on BOARD_NVIDIA_L1_2PVV
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config LB_CKS_RANGE_END
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int
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default 122
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depends on BOARD_NVIDIA_L1_2PVV
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config LB_CKS_LOC
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int
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default 123
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depends on BOARD_NVIDIA_L1_2PVV
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config MAINBOARD_PART_NUMBER
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string
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default "l1_2pvv"
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depends on BOARD_NVIDIA_L1_2PVV
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config PCI_64BIT_PREF_MEM
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config HAVE_FALLBACK_BOOT
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config USE_FALLBACK_IMAGE
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_NVIDIA_L1_2PVV
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config MAX_CPUS
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int
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default 2
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depends on BOARD_NVIDIA_L1_2PVV
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config MAX_PHYSICAL_CPUS
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int
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default 1
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depends on BOARD_NVIDIA_L1_2PVV
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config AP_CODE_IN_CAR
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_NVIDIA_L1_2PVV
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_NVIDIA_L1_2PVV
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config USE_INIT
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config SERIAL_CPU_INIT
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config WAIT_BEFORE_CPUS_INIT
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bool
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default n
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depends on BOARD_NVIDIA_L1_2PVV
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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depends on BOARD_NVIDIA_L1_2PVV
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x2b80
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depends on BOARD_NVIDIA_L1_2PVV
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config IRQ_SLOT_COUNT
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int
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default 11
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depends on BOARD_NVIDIA_L1_2PVV
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59
src/mainboard/nvidia/l1_2pvv/Makefile.inc
Normal file
59
src/mainboard/nvidia/l1_2pvv/Makefile.inc
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2008 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of
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## the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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## MA 02110-1301 USA
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##
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driver-y += mainboard.o
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#needed by irq_tables and mptable and acpi_tables
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obj-y += get_bus_conf.o
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obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
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obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
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obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
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obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
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# This is part of the conversion to init-obj and away from included code.
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initobj-y += crt0.o
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crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
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crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
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crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
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crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
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crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
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crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
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crt0-y += auto.inc
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ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
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ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
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ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
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ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
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ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
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ldscript-y += ../../../../src/arch/i386/lib/failover.lds
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ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
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ifdef POST_EVALUATION
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$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
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perl -e 's/\.rodata/.rom.data/g' -pi $@
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perl -e 's/\.text/.section .rom.text/g' -pi $@
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endif
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