From fdb0701336e35f45c00beef43df5d41777231f3a Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 3 Apr 2025 08:36:54 +0200 Subject: [PATCH] soc/amd/common/block/spi: Enforce default ROM mapping Make sure that the ROM2 MMIO area starts at flash address 0. Document 56780 Change-Id: I1fc06517ea496441147375579800f7349e39facc Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/87176 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/amd/common/block/spi/mmap_boot.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/soc/amd/common/block/spi/mmap_boot.c b/src/soc/amd/common/block/spi/mmap_boot.c index d29af41636..6a917195ce 100644 --- a/src/soc/amd/common/block/spi/mmap_boot.c +++ b/src/soc/amd/common/block/spi/mmap_boot.c @@ -3,6 +3,7 @@ #include #include #include +#include #if CONFIG_ROM_SIZE >= (16 * MiB) #define ROM_SIZE (16 * MiB) @@ -18,6 +19,13 @@ static const struct mem_region_device boot_dev = const struct region_device *boot_device_ro(void) { + /* + * The following code assumes that ROM2 is mapped at flash offset 0. This is the default + * configuration currently enforced by soft-straps. + */ + if (fch_spi_rom_remapping() != 0) + die("Non default SPI ROM remapping is not supported!"); + return &boot_dev.rdev; }