diff --git a/src/soc/amd/common/block/spi/mmap_boot.c b/src/soc/amd/common/block/spi/mmap_boot.c
index d29af41636..6a917195ce 100644
--- a/src/soc/amd/common/block/spi/mmap_boot.c
+++ b/src/soc/amd/common/block/spi/mmap_boot.c
@@ -3,6 +3,7 @@
 #include <boot_device.h>
 #include <endian.h>
 #include <spi_flash.h>
+#include <amdblocks/spi.h>
 
 #if CONFIG_ROM_SIZE >= (16 * MiB)
 #define ROM_SIZE (16 * MiB)
@@ -18,6 +19,13 @@ static const struct mem_region_device boot_dev =
 
 const struct region_device *boot_device_ro(void)
 {
+	/*
+	 * The following code assumes that ROM2 is mapped at flash offset 0. This is the default
+	 * configuration currently enforced by soft-straps.
+	 */
+	if (fch_spi_rom_remapping() != 0)
+		die("Non default SPI ROM remapping is not supported!");
+
 	return &boot_dev.rdev;
 }