From fbcf0311811e7bb4a6d2c3945972a940d11cd360 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Carlos=20L=C3=B3pez?= <carlos.lopez@openchip.com>
Date: Tue, 17 Dec 2024 14:07:22 +0100
Subject: [PATCH] mb/qemu-riscv: set PCI_IOBASE
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The correct value for the IO base is at 0x3000000, so set it. Otherwise,
I/O operations (e.g. inb(), outb(), etc.) won't work.

Change-Id: I5106fa95401de53e70f0859d27e07d2b8fde9ca0
Signed-off-by: Carlos López <carlos.lopez@openchip.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85675
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
---
 src/mainboard/emulation/qemu-riscv/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv/Kconfig
index 286e68441e..18eaaf081d 100644
--- a/src/mainboard/emulation/qemu-riscv/Kconfig
+++ b/src/mainboard/emulation/qemu-riscv/Kconfig
@@ -79,4 +79,8 @@ config OPENSBI_TEXT_START
 	hex
 	default 0x80020000
 
+config PCI_IOBASE
+	hex
+	default 0x3000000
+
 endif #  BOARD_EMULATION_QEMU_RISCV