soc/intel/*: Select 'DRAM_SUPPORT_DDRx' as appropriate

These will be used in subsequent patches which optimize the reading of
SPDs based on the supported memory type(s).

Change-Id: I8b0d4f37b4b992c42bede25d678cb9afc9db3dd6
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88521
Reviewed-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>

src/soc/intel/alderlake/Kconfig

@@ -12,6 +12,8 @@ config SOC_INTEL_ALDERLAKE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
 	select DEFAULT_SOFTWARE_CONNECTION_MANAGER
 	select DISPLAY_FSP_VERSION_INFO
+	select DRAM_SUPPORT_DDR4
+	select DRAM_SUPPORT_DDR5
 	select DRIVERS_USB_ACPI
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FSP_COMPRESS_FSP_S_LZ4

src/soc/intel/apollolake/Kconfig

@@ -10,6 +10,8 @@ config SOC_INTEL_APOLLOLAKE
 	# CPU specific options
 	select CPU_INTEL_COMMON
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
+	select DRAM_SUPPORT_DDR3
+	select DRAM_SUPPORT_LPDDR4
 	select PCR_COMMON_IOSF_1_0
 	select SSE2
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/soc/intel/braswell/Kconfig

@@ -40,6 +40,7 @@ config SOC_INTEL_BRASWELL
 	select NO_CBFS_MCACHE
 	select TCO_SPACE_NOT_YET_SPLIT
 	select NEED_SMALL_2MB_PAGE_TABLES
+	select DRAM_SUPPORT_DDR3
 	help
 	  Braswell M/D part support.
 

src/soc/intel/broadwell/Kconfig

@@ -4,6 +4,7 @@ config SOC_INTEL_BROADWELL
 	bool
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_HASWELL
+	select DRAM_SUPPORT_DDR3
 	select GENERIC_GPIO_LIB
 	select INTEL_GMA_ACPI
 	select MRC_SETTINGS_PROTECT

src/soc/intel/cannonlake/Kconfig

@@ -11,6 +11,7 @@ config SOC_INTEL_CANNONLAKE_BASE
 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
 	select DISPLAY_FSP_VERSION_INFO
+	select DRAM_SUPPORT_DDR4
 	select DRIVERS_USB_ACPI
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FSP_COMPRESS_FSP_S_LZMA

src/soc/intel/denverton_ns/Kconfig

@@ -9,6 +9,7 @@ config SOC_INTEL_DENVERTON_NS
 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
 	select DEBUG_GPIO
+	select DRAM_SUPPORT_DDR4
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FSP_M_XIP
 	select FSP_T_XIP if FSP_CAR

src/soc/intel/elkhartlake/Kconfig

@@ -10,6 +10,8 @@ config SOC_INTEL_ELKHARTLAKE
 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
 	select DISPLAY_FSP_VERSION_INFO
+	select DRAM_SUPPORT_DDR4
+	select DRAM_SUPPORT_LPDDR4
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FSP_COMPRESS_FSP_S_LZ4
 	select FSP_M_XIP

src/soc/intel/jasperlake/Kconfig

@@ -11,6 +11,7 @@ config SOC_INTEL_JASPERLAKE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
 	select COS_MAPPED_TO_MSB
 	select DISPLAY_FSP_VERSION_INFO_2
+	select DRAM_SUPPORT_DDR4
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FSP_COMPRESS_FSP_S_LZ4
 	select FSP_M_XIP

src/soc/intel/meteorlake/Kconfig

@@ -14,6 +14,7 @@ config SOC_INTEL_METEORLAKE
 	select DEFAULT_SOFTWARE_CONNECTION_MANAGER
 	select DEFAULT_X2APIC_LATE_WORKAROUND
 	select DISPLAY_FSP_VERSION_INFO_2 if !FSP_USE_REPO
+	select DRAM_SUPPORT_DDR5
 	select DRIVERS_USB_ACPI
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FSP_COMPRESS_FSP_S_LZ4

src/soc/intel/pantherlake/Kconfig

@@ -17,6 +17,7 @@ config SOC_INTEL_PANTHERLAKE_BASE
 	select DEFAULT_X2APIC_LATE_WORKAROUND
 	select POSTPONE_SPI_ACCESS
 	select DISPLAY_FSP_VERSION_INFO_2
+	select DRAM_SUPPORT_DDR5
 	select DRIVERS_USB_ACPI
 	select FAST_SPI_DMA
 	select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW

src/soc/intel/skylake/Kconfig

@@ -10,6 +10,8 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
 	select CPU_INTEL_COMMON
 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
+	select DRAM_SUPPORT_DDR3
+	select DRAM_SUPPORT_DDR4
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FSP_COMPRESS_FSP_S_LZ4
 	select FSP_M_XIP

src/soc/intel/tigerlake/Kconfig

@@ -12,6 +12,8 @@ config SOC_INTEL_TIGERLAKE
 	select CPU_SUPPORTS_PM_TIMER_EMULATION
 	select DEFAULT_SOFTWARE_CONNECTION_MANAGER
 	select DISPLAY_FSP_VERSION_INFO if !FSP_TYPE_IOT
+	select DRAM_SUPPORT_DDR4
+	select DRAM_SUPPORT_LPDDR4
 	select DRIVERS_USB_ACPI
 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
 	select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW

src/soc/intel/xeon_sp/cpx/Kconfig

@@ -9,6 +9,7 @@ config SOC_INTEL_COOPERLAKE_SP
 	select HAVE_INTEL_FSP_REPO
 	select FSP_SPEC_VIOLATION_XEON_SP_HEAP_WORKAROUND
 	select UDK_202005_BINDING
+	select DRAM_SUPPORT_DDR4
 	help
 	  Intel Cooper Lake-SP support
 

src/soc/intel/xeon_sp/gnr/Kconfig

@@ -14,6 +14,7 @@ config SOC_INTEL_GRANITERAPIDS
 	select PLATFORM_USES_FSP2_X86_32
 	select HAVE_IOAT_DOMAINS
 	select FSP_SPEC_VIOLATION_XEON_SP_HEAP_WORKAROUND
+	select DRAM_SUPPORT_DDR5
 	help
 	  Intel Granite Rapids support
 

src/soc/intel/xeon_sp/skx/Kconfig

@@ -8,6 +8,7 @@ config SOC_INTEL_SKYLAKE_SP
 	select UDK_202005_BINDING
 	select HAVE_X86_64_SUPPORT
 	select USE_X86_64_SUPPORT
+	select DRAM_SUPPORT_DDR4
 	help
 	  Intel Skylake-SP support
 

src/soc/intel/xeon_sp/spr/Kconfig

@@ -17,6 +17,7 @@ config SOC_INTEL_SAPPHIRERAPIDS_SP
 	select SOC_INTEL_HAS_CXL
 	select HAVE_X86_64_SUPPORT
 	select HAVE_INTEL_FSP_REPO
+	select DRAM_SUPPORT_DDR5
 	help
 	  Intel Sapphire Rapids-SP support