From fbacae625a1aa117e03f465f92b3c09d607cedbb Mon Sep 17 00:00:00 2001
From: Subrata Banik <subratabanik@google.com>
Date: Mon, 9 Dec 2024 13:15:28 +0530
Subject: [PATCH] soc/intel/ptl: Enable UFS functionality by adding IRQ
 programming

This commit adds the necessary IRQ programming for the UFS controller,
addressing an issue where the device was not operational after booting
to the OS.

BUG=b:382243957
TEST=Built and booted google/fatcat successfully, verifying UFS
functionality.

with this patch

```
[SPEW ]   Interrupt assignment:
[SPEW ]    Dxx:Fx   INTx  IRQ
[SPEW ]    D23:F0    1    018
```

Change-Id: Ib479f0adaaae64cee4d2152534dae40e32614065
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85536
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Divagar Mohandass <divagar.mohandass@intel.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/pantherlake/fsp_params.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/soc/intel/pantherlake/fsp_params.c b/src/soc/intel/pantherlake/fsp_params.c
index e0b0adf392..dfc47c6988 100644
--- a/src/soc/intel/pantherlake/fsp_params.c
+++ b/src/soc/intel/pantherlake/fsp_params.c
@@ -199,6 +199,14 @@ static const struct slot_irq_constraints irq_constraints[] = {
 			ANY_PIRQ(PCI_DEVFN_CSE_4),
 		},
 	},
+#if CONFIG(SOC_INTEL_PANTHERLAKE_U_H)
+	{
+		.slot = PCI_DEV_SLOT_UFS,
+		.fns = {
+			ANY_PIRQ(PCI_DEVFN_UFS),
+		},
+	},
+#endif
 	{
 		.slot = PCI_DEV_SLOT_SIO1,
 		.fns = {