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soc/qualcomm/x1p42100: Clean up DDR and IMEM memory layout

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Align DDR and IMEM address definitions with memory layout
specifications. Modify CBMEM top address accordingly.

Changes include:
  - Declaring new memory regions in symbols_common.h.
  - Defining base addresses and sizes for these regions in memlayout.ld.
  - Marking these regions as reserved in soc_read_resources() to
  prevent overwrites by coreboot.
  - Modifying CBMEM top address.

TEST=Create an image.serial.bin and ensure it boots on X1P42100.

Change-Id: I77c95198d6e42635ab7ecaac41fbd29133cb0fa0
Signed-off-by: Swathi Tamilselvan <tswathi@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89348
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Swathi Tamilselvan 2025-09-24 16:47:02 +05:30 • committed by Subrata Banik
commit fba92daed3
5 changed files with 102 additions and 31 deletions
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12
src/soc/qualcomm/common/include/soc/symbols_common.h
View file

@ -32,9 +32,19 @@ DECLARE_REGION(dram_cpucp_dtbs)
DECLARE_REGION(dram_cpucp)
DECLARE_REGION(dram_modem)
DECLARE_REGION(dram_tz)
DECLARE_REGION(dram_tz_rem)
DECLARE_REGION(dram_ramdump)
DECLARE_REGION(dram_smem)
DECLARE_REGION(dram_ncc)
DECLARE_REGION(dram_xbl_log)
DECLARE_REGION(dram_tme_crashdump)
DECLARE_REGION(dram_tme_log)
DECLARE_REGION(dram_dc_log)
DECLARE_REGION(dram_tz_static)
DECLARE_REGION(dram_adsp_rpc_heap)
DECLARE_REGION(dram_llcc_lpi)
DECLARE_REGION(dram_ta)
DECLARE_REGION(dram_pdp)
DECLARE_REGION(dram_pil)
/*
* DDR_SPACE (2 GB) aka `_dram`: 0x80000000 - 0x100000000

3
src/soc/qualcomm/x1p42100/cbmem.c
View file

@ -1,9 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cbmem.h>
#include <soc/addressmap.h>
#include <soc/symbols_common.h>
uintptr_t cbmem_top_chipset(void)
{
return (uintptr_t)_dram_smem;
return (uintptr_t)CBMEM_TOP;
}

1
src/soc/qualcomm/x1p42100/include/soc/addressmap.h
View file

@ -11,6 +11,7 @@
#define GCC_BASE 0x00100000
#define NCC0_BASE 0x19A30000
#define CBMEM_TOP 0xC7800000
/* X1P42100 NCC0 PLL CONFIG ADDRESSES */
#define NCC0_NCC_CMU_NCC_PLL_CFG 0x199A2010
#define NCC0_NCC_CMU_NCC_CLK_CFG 0x199A2030

104
src/soc/qualcomm/x1p42100/memlayout.ld
View file

@ -4,7 +4,6 @@
#include <arch/header.ld>
#include <soc/memlayout.h>
/*
* The linker script below configures the memory layout for the Qualcomm X1P42100 SoC.
*
@ -21,21 +20,23 @@
* | ... (Memory not mapped: Unavailable) ... | XXXXXXXXX |
* 0x100000000 +----------------------------------------------------------+ <--------- |
* | dram_smem (Shared Memory) | ^ |
* 0xFFE00000 +----------------------------------------------------------+ | |
* | dram_llcc_lpi | | |
* 0xFF800000 +----------------------------------------------------------+ | |
* | CBMEM | | |
* +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0xDF4C0000 +----------------------------------------------------------+ | |
* | dram_ta | | |
* 0xD8600000 +----------------------------------------------------------+ | |
* | BL31 (ARM Trusted Firmware) | | |
* 0xD856A000 +----------------------------------------------------------+ | |
* | dram_tz_rem (TrustZone Remainder) | | |
* 0xD81D6000 +----------------------------------------------------------+ | |
* | dram_tz (TrustZone) | | |
* 0xD8000000 +----------------------------------------------------------+ | DRAM
* | ... Usable memory ... | | |
* 0xD7800000 +----------------------------------------------------------+ | |
* | Linux Kernel Reserve | | |
* 0xC7800000 +----------------------------------------------------------+ | |
* | CBMEM | | |
* +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0xA1800000 +----------------------------------------------------------+ | |
* | RAMSTAGE | DRAM Space 0 |
@ -44,13 +45,39 @@
* 0x9F800000 +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0x91380000 +----------------------------------------------------------+ | |
* | dram_pil | | |
* 0x866C0000 +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0x85F80000 +----------------------------------------------------------+ | |
* | dram_wlan | | |
* 0x85380000 +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0x82800000 +----------------------------------------------------------+ | |
* | dram_adsp_rpc_heap | | |
* 0x82000000 +----------------------------------------------------------+ | |
* | dram_tz_static | | |
* 0x81F00000 +----------------------------------------------------------+ | |
* | dram_pdp | | |
* 0x81E00000 +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0x81CF4000 +----------------------------------------------------------+ | |
* | dram_dc_log | | |
* 0x81CE4000 +----------------------------------------------------------+ | |
* | dram_tme_log | | |
* 0x81CE0000 +----------------------------------------------------------+ | |
* | dram_tme_crashdump | | |
* 0x81CA0000 +----------------------------------------------------------+ | |
* | dram_aop | | |
* 0x81C00000 +----------------------------------------------------------+ | |
* | dram_ramdump | | |
* 0x81A40000 +----------------------------------------------------------+ | |
* | dram_xbl_log | | |
* 0x81A00000 +----------------------------------------------------------+ | |
* | ... Usable memory ... | | |
* 0x815A0000 +----------------------------------------------------------+ | |
* | dram_cpucp | | |
* 0x80E00000 +----------------------------------------------------------+ | |
* | dram_ncc | | |
* 0x80A00000 +----------------------------------------------------------+ | |
* | ... Usable memory ... | v v
* 0x80000000 +----------------------------------------------------------+ <--------------
@ -60,9 +87,9 @@
* 0x24040000 +----------------------------------------------------------+ <---------
* | ... (Memory not mapped: Unavailable) ... | XXXXXXXXX
* 0x14A80000 +----------------------------------------------------------+ <---------
* | debug_policy | ^
* 0x14A7F000 +----------------------------------------------------------+ |
* | auth_metadata | |
* | auth_metadata | ^
* 0x14A7E000 +----------------------------------------------------------+ |
* | debug_policy | |
* 0x14A7D000 +----------------------------------------------------------+ |
* | ... Usable memory ... | |
* 0x14A59000 +----------------------------------------------------------+ |
@ -77,6 +104,8 @@
* | qclib | |
* 0x14897000 +----------------------------------------------------------+ |
* | ... Usable memory ... | |
* 0x14890000 +----------------------------------------------------------+ |
* | aop_blob_meta | |
* 0x1488C000 +----------------------------------------------------------+ |
* | qc_blob_meta | |
* 0x14888000 +----------------------------------------------------------+ |
@ -119,19 +148,23 @@
* | pbl_timestamps | v
* 0x14800000 +----------------------------------------------------------+ <---------
* | ... (Large Address Gap) ... |
* 0x146AB000 +----------------------------------------------------------+ <---------
* | shared_imem | ^
* 0x146A8000 +----------------------------------------------------------+ |
* | ... Usable memory ... | SSRAM
* 0x146AC000 +----------------------------------------------------------+ <---------
* | ... Usable memory ... | ^
* 0x146AB000 +----------------------------------------------------------+ |
* | shared_imem | |
* 0x146AA000 +----------------------------------------------------------+ SSRAM
* | ... Usable memory ... | |
* 0x146A5000 +----------------------------------------------------------+ |
* | qcsdi | v
* 0x14699000 +----------------------------------------------------------+ <---------
* | ... (Memory not mapped: Unavailable) ... | XXXXXXXXX
* 0x0B100000 +----------------------------------------------------------+ <---------
* | aop_data_ram | ^
* 0x0B0E0000 +----------------------------------------------------------+ |
* | ... Usable memory ... | AOP SRAM
* 0x0B080000 +----------------------------------------------------------+ |
* | ... Usable memory ... | ^
* 0x0B0E8000 +----------------------------------------------------------+ |
* | aop_data_ram | |
* 0x0B0E0000 +----------------------------------------------------------+ AOP SRAM
* | ... Usable memory ... | |
* 0x0B018000 +----------------------------------------------------------+ |
* | aop_code_ram | v
* 0x0B000000 +----------------------------------------------------------+ <---------
*
@ -140,14 +173,14 @@
SECTIONS
{
AOPSRAM_START(0x0B000000)
REGION(aop_code_ram, 0x0B000000, 0x80000, 4K)
REGION(aop_data_ram, 0x0B0E0000, 0x20000, 4K)
REGION(aop_code_ram, 0x0B000000, 0x18000, 4K)
REGION(aop_data_ram, 0x0B0E0000, 0x8000, 4K)
AOPSRAM_END(0x0B100000)
SSRAM_START(0x14680000)
REGION(qcsdi, 0x14699000, 48K, 4K)
REGION(shared_imem, 0x146A8000, 12K, 4K)
SSRAM_END(0x146AB000)
REGION(shared_imem, 0x146AA000, 0x1000, 4K)
SSRAM_END(0x146AC000)
BSRAM_START(0x14800000)
REGION(pbl_timestamps, 0x14800000, 84K, 4K)
@ -172,22 +205,37 @@ SECTIONS
REGION(cpr_settings, 0x14A17000, 12K, 4K)
PRERAM_CBMEM_CONSOLE(0x14A30000, 32K)
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14A38000, 132K)
REGION(auth_metadata,0x14A7D000 , 8K, 4K)
REGION(debug_policy, 0x14A7F000, 4K, 4K)
REGION(debug_policy, 0x14A7D000 , 4K, 4K)
REGION(auth_metadata, 0x14A7E000, 8K, 4K)
BSRAM_END(0x14A80000)
REGION(shrm, 0x24040000, 128K , 4K)
DRAM_START(0x80000000)
REGION(dram_cpucp, 0x80A00000, 0xBA0000, 4K)
REGION(dram_ramdump, 0x81A00000, 0x200000, 4K)
REGION(dram_aop, 0x81C00000, 0xF780000, 4K)
REGION(dram_ncc, 0x80A00000, 0x400000, 4K)
REGION(dram_cpucp, 0x80E00000, 0x7A0000, 4K)
REGION(dram_xbl_log, 0x81A00000, 0x40000, 4K)
REGION(dram_ramdump, 0x81A40000, 0x1C0000, 4K)
REGION(dram_aop, 0x81C00000, 0xA0000, 4K)
REGION(dram_tme_crashdump, 0x81CA0000, 0x40000, 4K)
REGION(dram_tme_log, 0x81CE0000, 0x4000, 4K)
REGION(dram_dc_log, 0x81CE4000, 0x10000, 4K)
REGION(dram_pdp, 0x81E00000, 0x100000, 4K)
REGION(dram_tz_static, 0x81F00000, 0x100000, 4K)
REGION(dram_adsp_rpc_heap, 0x82000000, 0x800000, 4K)
REGION(dram_wlan, 0x85380000, 0xC00000, 4K)
REGION(dram_pil, 0x866C0000, 0xACC0000, 4K)
POSTRAM_CBFS_CACHE(0x9F800000, 16M)
RAMSTAGE(0xA0800000, 16M)
REGION(dram_tz, 0xD8000000, 0xD6000, 4K)
REGION(dram_tz_rem, 0xD81D6000, 0x394000, 4K)
REGION(dram_tz, 0xD8000000, 0x56A000, 4K)
BL31(0xD856A000, 600K)
REGION(dram_smem, 0xFF800000, 0x800000, 4K)
REGION(dram_ta, 0xD8600000, 0x1000000, 4K)
REGION(dram_llcc_lpi, 0xFF800000, 0x600000, 4K)
REGION(dram_smem, 0xFFE00000, 0x200000, 4K)
DRAM_END(0x100000000)
/*

13
src/soc/qualcomm/x1p42100/soc.c
View file

@ -24,15 +24,26 @@ static void soc_read_resources(struct device *dev)
for (int i = 0; i < count; i++)
ram_range(dev, index++, (uintptr_t)config[i].offset, config[i].size);
reserved_ram_range(dev, index++, (uintptr_t)_dram_ncc, REGION_SIZE(dram_ncc));
reserved_ram_range(dev, index++, (uintptr_t)_dram_cpucp, REGION_SIZE(dram_cpucp));
reserved_ram_range(dev, index++, (uintptr_t)_dram_xbl_log, REGION_SIZE(dram_xbl_log));
reserved_ram_range(dev, index++, (uintptr_t)_dram_ramdump, REGION_SIZE(dram_ramdump));
reserved_ram_range(dev, index++, (uintptr_t)_dram_tz, REGION_SIZE(dram_tz));
reserved_ram_range(dev, index++, (uintptr_t)_dram_tz_rem, REGION_SIZE(dram_tz_rem));
reserved_ram_range(dev, index++, (uintptr_t)_dram_aop, REGION_SIZE(dram_aop));
reserved_ram_range(dev, index++, (uintptr_t)_dram_tme_crashdump, REGION_SIZE(dram_tme_crashdump));
reserved_ram_range(dev, index++, (uintptr_t)_dram_tme_log, REGION_SIZE(dram_tme_log));
reserved_ram_range(dev, index++, (uintptr_t)_dram_dc_log, REGION_SIZE(dram_dc_log));
reserved_ram_range(dev, index++, (uintptr_t)_dram_pdp, REGION_SIZE(dram_pdp));
reserved_ram_range(dev, index++, (uintptr_t)_dram_tz_static, REGION_SIZE(dram_tz_static));
reserved_ram_range(dev, index++, (uintptr_t)_dram_adsp_rpc_heap, REGION_SIZE(dram_adsp_rpc_heap));
reserved_ram_range(dev, index++, (uintptr_t)_dram_wlan, REGION_SIZE(dram_wlan));
reserved_ram_range(dev, index++, (uintptr_t)_dram_pil, REGION_SIZE(dram_pil));
reserved_ram_range(dev, index++, (uintptr_t)_dram_ta, REGION_SIZE(dram_ta));
reserved_ram_range(dev, index++, (uintptr_t)_dram_llcc_lpi, REGION_SIZE(dram_llcc_lpi));
reserved_ram_range(dev, index++, (uintptr_t)_dram_smem, REGION_SIZE(dram_smem));
}