From fba8c14c27af88a6b66f638396cb325b34b7d58d Mon Sep 17 00:00:00 2001 From: Simon Yang Date: Tue, 30 Sep 2025 19:53:51 +0800 Subject: [PATCH] mb/google/brya: add cnvi BT recovery mechanism Add BT _PRR related methods to mitigate BT lost issue. Refer to Intel TA#837249, toggling BTEN, BT_IF_SELECT, and BT_RESET_GPIO to recovery BT device when BT became a low-speed usb device. BUG=b:451095940 TEST=Run reboot stress and check kernel log, BT could be recovery. usb 3-10: new full-speed USB device number 4 using xhci_hcd usb 3-10: New USB device found, idVendor=8087, idProduct=0033, bcdDevice= 0.00 usb 3-10: New USB device strings: Mfr=0, Product=0, SerialNumber=0 usb 3-10: using ACPI '\_SB.PCI0.XHCI.RHUB.HS10' for 'reset' GPIO lookup usb 3-10: USB disconnect, device number 4 usb 3-10: new low-speed USB device number 5 using xhci_hcd usb 3-10: device descriptor read/64, error -71 usb 3-10: device descriptor read/64, error -71 usb 3-10: new low-speed USB device number 6 using xhci_hcd usb 3-10: device descriptor read/64, error -71 usb 3-10: device descriptor read/64, error -71 usb 3-10: new full-speed USB device number 7 using xhci_hcd usb 3-10: New USB device found, idVendor=8087, idProduct=0033, bcdDevice= 0.00 Change-Id: I0d485a9102676624da28d5d681ea4510444e17bd Signed-off-by: Simon Yang Signed-off-by: Jamie Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/89384 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal --- .../google/brya/acpi/cnvi_bt_reset.asl | 53 +++++++++++++++++++ src/mainboard/google/brya/dsdt.asl | 2 + 2 files changed, 55 insertions(+) create mode 100644 src/mainboard/google/brya/acpi/cnvi_bt_reset.asl diff --git a/src/mainboard/google/brya/acpi/cnvi_bt_reset.asl b/src/mainboard/google/brya/acpi/cnvi_bt_reset.asl new file mode 100644 index 0000000000..e2a387aee1 --- /dev/null +++ b/src/mainboard/google/brya/acpi/cnvi_bt_reset.asl @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include + +/* If variants use other GPIO for BT_RESET + Define it at variant/gpio.h */ +#ifndef BT_RESET_GPIO +#define BT_RESET_GPIO GPP_D4 +#endif + +#define CNV_BTEN GPP_VGPIO_0 +#define CNV_BT_IF_SELECT GPP_VGPIO_5 + +External (\_SB.PCI0.CTXS, MethodObj) +External (\_SB.PCI0.STXS, MethodObj) + +Scope (\_SB.PCI0.XHCI.RHUB.HS10) +{ + PowerResource (CTTR, 0x00, 0x0000) + { + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (One) + } + + Method (_ON, 0, NotSerialized) // _ON_: Power On + { + \_SB.PCI0.STXS(CNV_BTEN); + \_SB.PCI0.STXS(CNV_BT_IF_SELECT); + \_SB.PCI0.STXS(BT_RESET_GPIO); + Sleep (105) + } + + Method (_OFF, 0, NotSerialized) // _OFF: Power Off + { + \_SB.PCI0.CTXS(CNV_BTEN); + \_SB.PCI0.CTXS(CNV_BT_IF_SELECT); + \_SB.PCI0.CTXS(BT_RESET_GPIO); + Sleep (105) + } + + } + + Name (_PRR, Package (0x01) // _PRR: Power Resource for Reset + { + CTTR + }) + + Name (_PR0, Package (0x01) // _PR0: Power Resources for D0 + { + CTTR + }) +} diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl index 4f82409565..cd571ab6a8 100644 --- a/src/mainboard/google/brya/dsdt.asl +++ b/src/mainboard/google/brya/dsdt.asl @@ -46,4 +46,6 @@ DefinitionBlock( #if CONFIG(INCLUDE_NVIDIA_GPU_ASL) #include "acpi/gpu_top.asl" #endif + + #include "acpi/cnvi_bt_reset.asl" }