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sb/amd/rs780: Use 32 bit variable to avoid truncation

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The {read,write}_index functions expect a 32 bit value, as
do the bitwise operations.

Found-by: Coverity Scan #1229584
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Change-Id: Idc2bc46c899d5a4e8b089644dca076a88d97dd7c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
This commit is contained in:
Jacob Garber 2019-04-30 17:27:40 -06:00 • committed by Patrick Georgi
commit fb0fa7643e
1 changed files with 10 additions and 10 deletions
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20
src/southbridge/amd/rs780/ht.c
View file

@ -24,24 +24,24 @@
void avoid_lpc_dma_deadlock(struct device *nb_dev, struct device *sb_dev)
{
struct device *cpu_f0;
u8 reg;
u32 reg32;
cpu_f0 = pcidev_on_root(0x18, 0);
set_nbcfg_enable_bits(cpu_f0, 0x68, 3 << 21, 1 << 21);
reg = nbpcie_p_read_index(sb_dev, 0x10);
reg |= 0x100; /* bit9=1 */
nbpcie_p_write_index(sb_dev, 0x10, reg);
reg32 = nbpcie_p_read_index(sb_dev, 0x10);
reg32 |= 0x100; /* bit9=1 */
nbpcie_p_write_index(sb_dev, 0x10, reg32);
reg = nbpcie_p_read_index(nb_dev, 0x10);
reg |= 0x100; /* bit9=1 */
nbpcie_p_write_index(nb_dev, 0x10, reg);
reg32 = nbpcie_p_read_index(nb_dev, 0x10);
reg32 |= 0x100; /* bit9=1 */
nbpcie_p_write_index(nb_dev, 0x10, reg32);
/* Enable NP protocol over PCIE for memory-mapped writes targeting LPC
* Set this bit to avoid a deadlock condition. */
reg = htiu_read_index(nb_dev, 0x6);
reg |= 0x1000000; /* bit26 */
htiu_write_index(nb_dev, 0x6, reg);
reg32 = htiu_read_index(nb_dev, 0x6);
reg32 |= 0x1000000; /* bit26 */
htiu_write_index(nb_dev, 0x6, reg32);
}
static void pcie_init(struct device *dev)