soc/intel: Use chipset.cb for SATA device ops linking

Move SATA device operations linking from PCI Device ID matching
to chipset.cb files for all Intel SoCs that have them, matching the
approach used by Skylake.

Remove corresponding DIDs from sata.c for these SoCs; keep DID
matching only for SoCs without chipset.cb files.

Add `select SOC_INTEL_COMMON_BLOCK_SATA` to Apollolake SoC so that
the common block code is included, which it was not previously, even
though the APL/GLK PCI DIDs were included in the list. The net
effect is that the `SATA` ACPI device is now added to SSDT for
APL/GLK boards when they have SATA enabled.

This standardizes the approach across Intel SoCs and makes the
SATA controller configuration explicit in devicetree, and prevents
the endless proliferation of DIDs in the common driver code.

Change-Id: I4c296a88c4da5f91d1039877ec858857496527f0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90915
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub "Kuba" Czapiga <czapiga@google.com>

src/soc/intel/alderlake/chipset.cb

@@ -242,7 +242,7 @@ chip soc/intel/alderlake
 		device pci 16.3 alias kt off end
 		device pci 16.4 alias heci3 off end
 		device pci 16.5 alias heci4 off end
-		device pci 17.0 alias sata off end
+		device pci 17.0 alias sata off ops sata_ops end
 		device pci 19.0 alias i2c4 off ops i2c_dev_ops end
 		device pci 19.1 alias i2c5 off ops i2c_dev_ops end
 		device pci 19.2 alias uart2 off end

src/soc/intel/alderlake/chipset_pch_s.cb

@@ -373,7 +373,7 @@ chip soc/intel/alderlake
 		device pci 16.3 alias kt off end
 		device pci 16.4 alias heci3 off end
 		device pci 16.5 alias heci4 off end
-		device pci 17.0 alias sata off end
+		device pci 17.0 alias sata off ops sata_ops end
 		device pci 19.0 alias i2c4 off ops i2c_dev_ops end
 		device pci 19.1 alias i2c5 off ops i2c_dev_ops end
 		device pci 19.2 alias uart2 off end

src/soc/intel/apollolake/Kconfig

@@ -66,6 +66,7 @@ config SOC_INTEL_APOLLOLAKE
 	select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE
 	select SOC_INTEL_COMMON_BLOCK_SRAM
 	select SOC_INTEL_COMMON_BLOCK_SA
+	select SOC_INTEL_COMMON_BLOCK_SATA
 	select SOC_INTEL_COMMON_BLOCK_SCS
 	select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
 	select SOC_INTEL_COMMON_BLOCK_SMM

src/soc/intel/apollolake/chipset_apl.cb

@@ -15,7 +15,7 @@ chip soc/intel/apollolake
 		device pci 0f.1 alias heci2		off	end # HECI2
 		device pci 0f.2 alias heci3		off	end # HECI3
 		device pci 11.0 alias ish		off	end # SensorHub
-		device pci 12.0 alias sata		off	end # SATA
+		device pci 12.0 alias sata		off ops sata_ops end # SATA
 		device pci 13.0 alias pcie_rp01		off ops pcie_rp_ops	end # PCIE Express Root Port 1
 		device pci 13.1 alias pcie_rp02		off ops pcie_rp_ops	end # PCIE Express Root Port 2
 		device pci 13.2 alias pcie_rp03		off ops pcie_rp_ops	end # PCIE Express Root Port 3

src/soc/intel/apollolake/chipset_glk.cb

@@ -16,7 +16,7 @@ chip soc/intel/apollolake
 		device pci 0f.1 alias heci2		off	end # HECI2
 		device pci 0f.2 alias heci3		off	end # HECI3
 		device pci 11.0 alias ish		off	end # SensorHub
-		device pci 12.0 alias sata		off	end # SATA
+		device pci 12.0 alias sata		off ops sata_ops end # SATA
 		device pci 13.0 alias pcie_rp01		off ops pcie_rp_ops	end # PCIE Express Root Port 1
 		device pci 13.1 alias pcie_rp02		off ops pcie_rp_ops	end # PCIE Express Root Port 2
 		device pci 13.2 alias pcie_rp03		off ops pcie_rp_ops	end # PCIE Express Root Port 3

src/soc/intel/cannonlake/chipset.cb

@@ -92,7 +92,7 @@ chip soc/intel/cannonlake
 		device pci 16.3 alias csme_ktr     off	end	# Management Engine KT Redirection
 		device pci 16.4 alias heci3        off	end	# Management Engine Interface 3
 		device pci 16.5 alias heci4        off	end	# Management Engine Interface 4
-		device pci 17.0 alias sata         off	end	# SATA
+		device pci 17.0 alias sata         off ops sata_ops end	# SATA
 		device pci 19.0 alias i2c4         off ops i2c_dev_ops end	# I2C #4
 		device pci 19.1 alias i2c5         off ops i2c_dev_ops end	# I2C #5
 		device pci 19.2 alias uart2        off	end	# UART #2

src/soc/intel/cannonlake/chipset_pch_h.cb

@@ -116,7 +116,7 @@ chip soc/intel/cannonlake
 		device pci 16.3 alias csme_ktr     off	end	# Management Engine KT Redirection
 		device pci 16.4 alias heci3        off	end	# Management Engine Interface 3
 		device pci 16.5 alias heci4        off	end	# Management Engine Interface 4
-		device pci 17.0 alias sata         off	end	# SATA
+		device pci 17.0 alias sata         off ops sata_ops end	# SATA
 		device pci 19.0 alias i2c4         off ops i2c_dev_ops end	# I2C #4
 		device pci 19.1 alias i2c5         off ops i2c_dev_ops end	# I2C #5
 		device pci 19.2 alias uart2        off		# UART #2

src/soc/intel/common/block/sata/sata.c

@@ -35,13 +35,6 @@ struct device_operations sata_ops = {
 };
 
 static const unsigned short pci_device_ids[] = {
-	PCI_DID_INTEL_MTL_SATA,
-	PCI_DID_INTEL_ARL_SATA,
-	PCI_DID_INTEL_ARP_S_SATA_1,
-	PCI_DID_INTEL_ARP_S_SATA_2,
-	PCI_DID_INTEL_RPP_P_SATA_1,
-	PCI_DID_INTEL_RPP_P_SATA_2,
-	PCI_DID_INTEL_RPP_S_SATA,
 	PCI_DID_INTEL_LWB_SATA_AHCI,
 	PCI_DID_INTEL_LWB_SSATA_AHCI,
 	PCI_DID_INTEL_LWB_SATA_RAID,
@@ -54,43 +47,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DID_INTEL_LWB_SATA_ALT_RST,
 	PCI_DID_INTEL_LWB_SSATA_ALT,
 	PCI_DID_INTEL_LWB_SSATA_ALT_RST,
-	PCI_DID_INTEL_CNL_SATA,
-	PCI_DID_INTEL_CNL_PREMIUM_SATA,
-	PCI_DID_INTEL_CNP_CMP_COMPAT_SATA,
-	PCI_DID_INTEL_CNP_H_SATA,
-	PCI_DID_INTEL_CNP_H_HALO_SATA,
-	PCI_DID_INTEL_CNP_LP_SATA,
-	PCI_DID_INTEL_CMP_SATA,
-	PCI_DID_INTEL_CMP_PREMIUM_SATA,
-	PCI_DID_INTEL_CMP_LP_SATA,
-	PCI_DID_INTEL_CMP_H_SATA,
-	PCI_DID_INTEL_CMP_H_HALO_SATA,
-	PCI_DID_INTEL_CMP_H_PREMIUM_SATA,
-	PCI_DID_INTEL_TGP_LP_SATA,
-	PCI_DID_INTEL_TGP_SATA,
-	PCI_DID_INTEL_TGP_PREMIUM_SATA,
-	PCI_DID_INTEL_TGP_COMPAT_SATA,
-	PCI_DID_INTEL_TGP_H_SATA,
 	PCI_DID_INTEL_MCC_AHCI_SATA,
-	PCI_DID_INTEL_JSP_SATA_1,
-	PCI_DID_INTEL_JSP_SATA_2,
-	PCI_DID_INTEL_ADP_P_SATA_1,
-	PCI_DID_INTEL_ADP_P_SATA_2,
-	PCI_DID_INTEL_ADP_P_SATA_3,
-	PCI_DID_INTEL_ADP_P_SATA_4,
-	PCI_DID_INTEL_ADP_P_SATA_5,
-	PCI_DID_INTEL_ADP_P_SATA_6,
-	PCI_DID_INTEL_ADP_S_SATA_1,
-	PCI_DID_INTEL_ADP_S_SATA_2,
-	PCI_DID_INTEL_ADP_S_SATA_3,
-	PCI_DID_INTEL_ADP_S_SATA_4,
-	PCI_DID_INTEL_ADP_S_SATA_5,
-	PCI_DID_INTEL_ADP_S_SATA_6,
-	PCI_DID_INTEL_ADP_M_SATA_1,
-	PCI_DID_INTEL_ADP_M_SATA_2,
-	PCI_DID_INTEL_ADP_M_SATA_3,
-	PCI_DID_INTEL_APL_SATA,
-	PCI_DID_INTEL_GLK_SATA,
 	0
 };
 

src/soc/intel/jasperlake/chipset.cb

@@ -72,7 +72,7 @@ chip soc/intel/jasperlake
 		device pci 16.0 alias heci1		off end
 		device pci 16.1 alias heci2		off end
 		device pci 16.4 alias heci3		off end
-		device pci 17.0 alias sata		off end
+		device pci 17.0 alias sata		off ops sata_ops end
 		device pci 19.0 alias i2c4		off ops i2c_dev_ops end
 		device pci 19.1 alias i2c5		off ops i2c_dev_ops end
 		device pci 19.2 alias uart2		off end

src/soc/intel/meteorlake/chipset.cb

@@ -162,7 +162,7 @@ chip soc/intel/meteorlake
 		device pci 16.1 alias heci2 off end
 		device pci 16.4 alias heci3 off end
 		device pci 16.5 alias heci4 off end
-		device pci 17.0 alias sata off end
+		device pci 17.0 alias sata off ops sata_ops end
 		device pci 18.0 alias eheci1 off end
 		device pci 18.1 alias eheci2 off end
 		device pci 18.2 alias eheci3 off end

src/soc/intel/tigerlake/chipset.cb

@@ -125,7 +125,7 @@ chip soc/intel/tigerlake
 		device pci 16.3 alias csme2 off end
 		device pci 16.4 alias heci3 off end
 		device pci 16.5 alias heci4 off end
-		device pci 17.0 alias sata off end
+		device pci 17.0 alias sata off ops sata_ops end
 		device pci 19.0 alias i2c4 off ops i2c_dev_ops end
 		device pci 19.1 alias i2c5 off ops i2c_dev_ops end
 		device pci 19.2 alias uart2 off end

src/soc/intel/tigerlake/chipset_pch_h.cb

@@ -147,7 +147,7 @@ chip soc/intel/tigerlake
 		device pci 16.3 alias csme2 off end
 		device pci 16.4 alias heci3 off end
 		device pci 16.5 alias heci4 off end
-		device pci 17.0 alias sata off end
+		device pci 17.0 alias sata off ops sata_ops end
 		device pci 19.0 alias i2c4 off ops i2c_dev_ops end
 		device pci 19.1 alias i2c5 off ops i2c_dev_ops end
 		device pci 19.2 alias uart2 off end