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UPSTREAM: soc/marvell/bg4cd: remove cosmos mainboard and bg4cd soc

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The SoC code was never completed. It's just a skeleton that gets
in the way of refactoring other code. Likewise, the mainboard was
never completed either. Just remove them both.

BUG=none
BRANCH=none
TEST=none

Change-Id: I19d42549463e9726bcd4bcd119634733a933e184
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 250715eb2f
Original-Change-Id: I8faaa9bb1b90ad2936dcdbaf2882651ebba6630c
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19823
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/513957
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Aaron Durbin 2017-05-22 16:28:46 -05:00 • committed by chrome-bot
commit fac51768bd
27 changed files with 0 additions and 798 deletions
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56
src/mainboard/google/cosmos/Kconfig
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@ -1,56 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
if BOARD_GOOGLE_COSMOS
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select BOARD_ID_AUTO
select BOARD_ROMSIZE_KB_2048
select COMMON_CBFS_SPI_WRAPPER
select HAVE_HARD_RESET
select MAINBOARD_HAS_CHROMEOS
select SOC_MARVELL_BG4CD
select SPI_FLASH
select SPI_FLASH_SPANSION
config VBOOT
select VBOOT_VBNV_FLASH
config MAINBOARD_DIR
string
default google/cosmos
config MAINBOARD_PART_NUMBER
string
default "Cosmos"
config MAINBOARD_VENDOR
string
default "Google"
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 2
config DRAM_SIZE_MB
int
default 1024
config GBB_HWID
string
depends on CHROMEOS
default "Cosmos TEST 1"
endif # BOARD_GOOGLE_COSMOS

2
src/mainboard/google/cosmos/Kconfig.name
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@ -1,2 +0,0 @@
config BOARD_GOOGLE_COSMOS
bool "Cosmos"

37
src/mainboard/google/cosmos/Makefile.inc
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@ -1,37 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
bootblock-y += bootblock.c
bootblock-y += boardid.c
bootblock-y += chromeos.c
bootblock-y += reset.c
verstage-y += boardid.c
verstage-y += chromeos.c
verstage-y += reset.c
romstage-y += boardid.c
romstage-y += chromeos.c
romstage-y += romstage.c
romstage-y += reset.c
ramstage-y += boardid.c
ramstage-y += chromeos.c
ramstage-y += mainboard.c
ramstage-y += reset.c
bootblock-y += memlayout.ld
verstage-y += memlayout.ld
romstage-y += memlayout.ld
ramstage-y += memlayout.ld

5
src/mainboard/google/cosmos/board_info.txt
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@ -1,5 +0,0 @@
Vendor name: Google
Board name: Cosmos Marvell BG4CD reference board
Category: eval
ROM protocol: SPI
ROM socketed: n

21
src/mainboard/google/cosmos/boardid.c
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <boardid.h>
uint8_t board_id(void)
{
return -1;
}

20
src/mainboard/google/cosmos/bootblock.c
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@ -1,20 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <bootblock_common.h>
void bootblock_mainboard_init(void)
{
}

31
src/mainboard/google/cosmos/chromeos.c
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@ -1,31 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <boot/coreboot_tables.h>
#include <vendorcode/google/chromeos/chromeos.h>
void fill_lb_gpios(struct lb_gpios *gpios)
{
}
int get_recovery_mode_switch(void)
{
return 0;
}
int get_write_protect_state(void)
{
return 0;
}

28
src/mainboard/google/cosmos/chromeos.fmd
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@ -1,28 +0,0 @@
FLASH@0x0 0x200000 {
WP_RO@0x0 0x100000 {
RO_SECTION@0x0 0xf0000 {
BOOTBLOCK@0 128K
COREBOOT(CBFS)@0x20000 0x60000
FMAP@0x80000 0x1000
GBB@0x81000 0x6ef00
RO_FRID@0xeff00 0x100
}
RO_VPD@0xf0000 0x10000
}
RW_SECTION_A@0x100000 0x68000 {
VBLOCK_A@0x0 0x2000
FW_MAIN_A(CBFS)@0x2000 0x65f00
RW_FWID_A@0x67f00 0x100
}
RW_SHARED@0x168000 0x4000 {
SHARED_DATA@0x0 0x4000
}
RW_ELOG@0x16c000 0x4000
RW_SECTION_B@0x180000 0x68000 {
VBLOCK_B@0x0 0x2000
FW_MAIN_B(CBFS)@0x2000 0x65f00
RW_FWID_B@0x67f00 0x100
}
RW_VPD@0x1e8000 0x8000
RW_NVRAM@0x1f0000 0x10000
}

19
src/mainboard/google/cosmos/devicetree.cb
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@ -1,19 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
# TODO fill with Versatile Express board data in QEMU.
chip soc/marvell/bg4cd
device cpu_cluster 0 on end
end

34
src/mainboard/google/cosmos/mainboard.c
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@ -1,34 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <boot/coreboot_tables.h>
static void mainboard_init(device_t dev)
{
}
static void mainboard_enable(device_t dev)
{
dev->ops->init = &mainboard_init;
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};
void lb_board(struct lb_header *header)
{
}

14
src/mainboard/google/cosmos/memlayout.ld
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@ -1,14 +0,0 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <soc/memlayout.ld>

22
src/mainboard/google/cosmos/reset.c
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@ -1,22 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <reset.h>
void hard_reset(void)
{
while (1)
;
}

53
src/mainboard/google/cosmos/romstage.c
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@ -1,53 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/cache.h>
#include <arch/exception.h>
#include <arch/stages.h>
#include <armv7.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <program_loading.h>
#include <soc/sdram.h>
#include <stdlib.h>
#include <symbols.h>
#include <timestamp.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include "timer.h"
void main(void)
{
timestamp_add_now(TS_START_ROMSTAGE);
console_init();
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_init();
timestamp_add_now(TS_AFTER_INITRAM);
mmu_init();
mmu_config_range(0, 4096, DCACHE_OFF);
dcache_mmu_enable();
cbmem_initialize_empty();
run_ramstage();
}