From f90eab44c17debf4dc223fc6422a6eab5b62ba9b Mon Sep 17 00:00:00 2001 From: jiazi Yang Date: Mon, 9 Nov 2015 14:07:31 +0800 Subject: [PATCH] Mickey: Update LPDDR3 configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This makes the same changes to the LPDDR3 configuration that were made for Samsung modules: - Enable ODT function - Change DS to 40 Ω from 34.3 Ω BUG=chrome-os-partner:47416 BRANCH=firmware-veyron-6588.B TEST=Boot on mickey elpida board Change-Id: I2d54d3087ecd3536469866f30e4eb2d8b1acd5c1 Signed-off-by: jiazi Yang Reviewed-on: https://chromium-review.googlesource.com/311153 Reviewed-by: Julius Werner --- .../veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc | 5 +++-- .../veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc | 5 +++-- .../veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 5 +++-- .../veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc | 5 +++-- .../veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc | 5 +++-- 5 files changed, 15 insertions(+), 10 deletions(-) diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc index ef82b27781..cb92d34571 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-2GB.inc @@ -65,7 +65,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -74,5 +75,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 9, - .odt = 0 + .odt = 1 }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc index e071646bf4..c2293d5621 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-elpida-4GB.inc @@ -65,7 +65,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -74,5 +75,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 13, - .odt = 0 + .odt = 1 }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc index 00dc549161..857365293b 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB.inc @@ -65,7 +65,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -74,5 +75,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 9, - .odt = 0, + .odt = 1, }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc index a48ac42a0e..57dca32179 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-4GB.inc @@ -64,7 +64,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -73,5 +74,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 13, - .odt = 0, + .odt = 1, }, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc index 09d260bc23..c3e8fe4ab4 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-4GB.inc @@ -64,7 +64,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x2 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, @@ -73,5 +74,5 @@ .dramtype = LPDDR3, .num_channels = 2, .stride = 13, - .odt = 0, + .odt = 1, },