soc/mediatek/mt8189: Enable lastbus debug hardware

Lastbus is a bus debug tool. When the bus hangs, the bus transmission
information before resetting will be recorded. The watchdog cannot
clear it and it will be printed out on the serial console for bus
hanging analysis. On MT8189, this feature is enabled by using the
common driver lastbusv2.

BUG=b:379008996
BRANCH=skywalker
TEST=When detected bus timeout, lastbus show:
debug_ctrl_ao_INFRA_AO 0x10023000 43
3a8a4f33
a8a48000
00080003
13018200
af99e400
0003fc90
00001104
0009c7e1
30c00033
00000001
00000003
00003294
003c00a3
019f9ccf
00000000
00200000
f007fffe
0000001f
0e800000
80143800
070c2002
ff9215de
001f9215
00009860
00000033
60000000
3a2e4919
000150c5
00000026
01416600
81438640
00000000
d6450001
0000000c
818b1501
00000540
80000000
fff70001
fff00000
fe00011e
000001ff
11040003
00004e67

timestamp: 0x22c18b05c

Signed-off-by: Zexin Wang <ot_zexin.wang@mediatek.corp-partner.google.com>
Change-Id: I8e0d8aa925e413459044737ffe4ef142fca8d627
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89024
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Zexin Wang 2025-08-17 12:43:53 +08:00 committed by Yu-Ping Wu
commit f8685bb2ee
4 changed files with 54 additions and 0 deletions

View file

@ -12,6 +12,7 @@ all-y += ../common/uart.c
bootblock-y += ../common/bootblock.c bootblock.c
bootblock-y += efuse.c
bootblock-y += ../common/lastbus_v2.c lastbus.c
bootblock-y += ../common/mmu_operations.c
bootblock-y += ../common/mtcmos.c mtcmos.c
bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c

View file

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
#include <bootblock_common.h>
#include <soc/lastbus_v2.h>
#include <soc/mmu_operations.h>
#include <soc/pll.h>
#include <soc/spm_mtcmos.h>
@ -9,6 +10,7 @@
void bootblock_soc_init(void)
{
mtk_mmu_init();
lastbus_init();
mtk_wdt_init();
mt_pll_init();
mtcmos_init();

View file

@ -33,8 +33,11 @@ enum {
APMIXED_BASE = IO_PHYS + 0x0000C000,
DEVAPC_INFRA_SECU_AO_BASE = IO_PHYS + 0x0001C000,
INFRA_AO_BCRM_BASE = IO_PHYS + 0x00022000,
INFRA_AO_DEBUG_BASE = IO_PHYS + 0x00023000,
INFRA_AO1_DEBUG_BASE = IO_PHYS + 0x0002B000,
DEVAPC_INFRA_AO_BASE = IO_PHYS + 0x00030000,
DEVAPC_INFRA_AO1_BASE = IO_PHYS + 0x00034000,
EMISYS_NAO_DEBUG_BASE = IO_PHYS + 0x00042000,
INFRACFG_BASE = IO_PHYS + 0x0020E000,
EMI0_BASE = IO_PHYS + 0x00219000,
EMI0_MPU_BASE = IO_PHYS + 0x00226000,
@ -58,6 +61,7 @@ enum {
AUXADC_BASE = IO_PHYS + 0x01019000,
PERI_AO_BCRM_BASE = IO_PHYS + 0x01035000,
PERICFG_AO_BASE = IO_PHYS + 0x01036000,
PERI_PAR_AO_DEBUG_BASE = IO_PHYS + 0x01037000,
DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0103C000,
AUDIO_BASE = IO_PHYS + 0x01050000,
SSUSB_IPPC_BASE_P0 = IO_PHYS + 0x01203E00,
@ -137,6 +141,7 @@ enum {
VLP_CK_BASE = IO_PHYS + 0x0C012000,
PMICSPI_MST_BASE = IO_PHYS + 0x0C013000,
DEVAPC_VLP_AO_BASE = IO_PHYS + 0x0C018000,
VLP_AO_DEBUG_BASE = IO_PHYS + 0x0C01D000,
SSPM_SRAM_BASE = IO_PHYS + 0x0C300000,
SSPM_CFG_BASE = IO_PHYS + 0x0C340000,
SCP_IIC_BASE = IO_PHYS + 0x0C80A000,

View file

@ -0,0 +1,46 @@
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
#include <device/mmio.h>
#include <soc/addressmap.h>
#include <soc/lastbus_v2.h>
static const struct lastbus_monitor monitors[] = {
{
.name = "debug_ctrl_ao_INFRA_AO",
.base = INFRA_AO_DEBUG_BASE,
.num_ports = 43,
.bus_freq_mhz = 78,
},
{
.name = "debug_ctrl_ao_INFRA_AO1",
.base = INFRA_AO1_DEBUG_BASE,
.num_ports = 12,
.bus_freq_mhz = 78,
},
{
.name = "debug_ctrl_ao_EMISYS_NAO",
.base = EMISYS_NAO_DEBUG_BASE,
.num_ports = 11,
.bus_freq_mhz = 728,
},
{
.name = "debug_ctrl_ao_PERI_PAR_AO",
.base = PERI_PAR_AO_DEBUG_BASE,
.num_ports = 23,
.bus_freq_mhz = 78,
},
{
.name = "debug_ctrl_ao_VLP_AO",
.base = VLP_AO_DEBUG_BASE,
.num_ports = 12,
.bus_freq_mhz = 156,
},
};
const struct lastbus_config lastbus_cfg = {
.latch_platform = "MT8189",
.timeout_ms = 200,
.timeout_type = 0,
.num_used_monitors = ARRAY_SIZE(monitors),
.monitors = monitors,
};