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UPSTREAM: intel/model_206ax: Move platform specific defines

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Change-Id: I3c517fc55dd333b1a457324f1d69aeb6f70acec2
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/15197
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry-picked from commit d72cc4111b)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354183
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-06-15 06:15:46 +03:00 • committed by chrome-bot
commit f823645e6c
3 changed files with 9 additions and 12 deletions
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src/cpu/intel/model_206ax/cache_as_ram.inc
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@ -17,8 +17,8 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/post_code.h>
#include <cbmem.h>
#include <arch/acpi.h>
#include "northbridge/intel/sandybridge/sandybridge.h"
#define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE
#define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE