From f7dc2a0772f0c8431bd42044ba616525d7733f1c Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Wed, 8 Oct 2014 17:23:09 +0800 Subject: [PATCH] pearlvalley: enable M.2 socket power for wlan according to schematic, GPIO29 needs to output high to enable M.2 socket power BUG=none BRANCH=none TEST=build ok and see wifi device on M.2 socket working in OS Change-Id: I7f122541a7bf3a5d7872f37a866ea3f1e52e8b47 Signed-off-by: Kane Chen Reviewed-on: https://chromium-review.googlesource.com/221927 Reviewed-by: Duncan Laurie --- src/mainboard/intel/pearlvalley/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/intel/pearlvalley/gpio.h b/src/mainboard/intel/pearlvalley/gpio.h index 7883a3792e..ef04bb65d3 100644 --- a/src/mainboard/intel/pearlvalley/gpio.h +++ b/src/mainboard/intel/pearlvalley/gpio.h @@ -52,7 +52,7 @@ static const struct gpio_config mainboard_gpio_config[] = { PCH_GPIO_IRQ_EDGE, /* 26: NFC_IRQ_MGP5 */ PCH_GPIO_ACPI_SCI, /* 27: SMC_WAKE_SCI_N */ PCH_GPIO_OUT_LOW, /* 28: PCH_NFC_RESET */ - PCH_GPIO_NATIVE, /* 29: PCH_SLP_WLAN_N */ + PCH_GPIO_OUT_HIGH, /* 29: PCH_SLP_WLAN_N */ PCH_GPIO_NATIVE, /* 30: SUS_PWR_ACK_R */ PCH_GPIO_NATIVE, /* 31: AC_PRESENT_R */ PCH_GPIO_NATIVE, /* 32: PM_CKRUN_N */