Add support for creating an smm top-level object.

Whether SMM is added or not depends on the mainboard. To enable SMM, 
the Kconfig variable SMM should be set, and the SMM variable should be 
defined in the mainbard. 

Also correct a type CONFIG_HPET should be HPET. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1065 f3766cd6-281f-0410-b1cd-43a5c92072e9

arch/x86/Kconfig

@@ -72,13 +72,21 @@ config CPU_VIA_C7
 	  arch/x86/Makefile for more hints on possible values.
 	  It is usually set in mainboard/*/Kconfig.
 
-config CONFIG_HPET
+config HPET
 	boolean
 	depends CPU_AMD_K8
 	help
 	  Whether to configure a High Precision Event Timer (HPET). Note that
 	  HPETs are known to be bug-prone.
 
+config SMM
+	boolean
+	help
+	  Whether to configure System Management Mode support. 
+	  This is mainboard-enabled. This is a tricky option that 
+	  should not be enabled/disabled casually, as some chipsets
+	  will not work without some form of SMM enabled.
+
 config K8_REV_F_SUPPORT
 	hex
 	default 0 if CPU_AMD_K8

arch/x86/Makefile

@@ -48,7 +48,7 @@ ifeq ($(CONFIG_DEFAULT_COMPRESSION_NRV2B),y)
 COMPRESSFLAG := -C nrv2b
 endif
 
-$(obj)/coreboot.rom $(obj)/coreboot.map: $(obj)/coreboot.bootblock $(obj)/util/lar/lar lzma nrv2b $(obj)/coreboot.initram $(obj)/coreboot.stage2 $(obj)/option_table
+$(obj)/coreboot.rom $(obj)/coreboot.map: $(obj)/coreboot.bootblock $(obj)/util/lar/lar lzma nrv2b $(obj)/coreboot.initram $(obj)/coreboot.stage2 $(obj)/option_table $(SMM)
 	$(Q)printf "  LAR     $(subst $(shell pwd)/,,$(@))\n"
 	$(Q)rm -f $(obj)/coreboot.rom
 	$(Q)cd $(obj) && \
@@ -73,6 +73,10 @@ endif
 ifeq ($(CONFIG_ZERO_AFTER_PAYLOAD),y)
 	$(Q)printf "  ZEROING lar -z ./coreboot.rom\n"
 	$(Q)cd $(obj) && ./util/lar/lar -z ./coreboot.rom
+endif
+ifeq ($(CONFIG_SMM),y)
+	$(Q)printf "  Adding smm.elf\n"
+	$(Q)cd $(obj) && ./util/lar/lar -e $(COMPRESSFLAG) -a $(obj)/coreboot.rom $(SMM):normal/smm;
 endif
 	$(Q)# QEMU wants bios.bin:
 	$(Q)# Run "qemu -L build/ -serial stdio -hda /dev/zero".

mainboard/kontron/986lcd-m/Makefile

@@ -35,3 +35,4 @@ $(obj)/coreboot.vpd:
 	$(Q)printf "  BUILD   DUMMY VPD\n"
 	$(Q)dd if=/dev/zero of=$(obj)/coreboot.vpd bs=256 count=1 $(SILENT)
 
+SMM := $(obj)/southbridge/intel/i82801gx/smm.elf

mainboard/kontron/986lcd-m/mainboard.h

@@ -31,3 +31,5 @@
 /* nowhere else to go yet */
 #define TEST_SMM_FLASH_LOCKDOWN 0
 
+#define TTYS0_BASE 0x3f8
+

mainboard/kontron/Kconfig

@@ -32,6 +32,7 @@ config BOARD_KONTRON_986LCD_M
 	select SOUTHBRIDGE_INTEL_I82801GX
 	select SUPERIO_WINBOND_W83627THG
 	select PIRQ_TABLE
+	select SMM
 	help
 	  Kontron 986LCD-M Series mainboards