mb/google/rauru: Pass XHCI_INIT_DONE to the payload

Configure GPIO EINT28 (XHCI_INIT_DONE) as output, so that payloads
(for example depthcharge) can assert it to notify EC to enable USB VBUS.

BUG=b:317009620
TEST=emerge-rauru coreboot

Change-Id: I5950974435b56997626886b16d371cd8e6472e3c
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84691
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>

src/mainboard/google/rauru/bootblock.c

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
+#include <gpio.h>
 #include <soc/spi.h>
 
 #include "gpio.h"
@@ -14,4 +15,5 @@ void bootblock_mainboard_init(void)
 {
 	mtk_snfc_init();
 	usb3_hub_reset();
+	setup_chromeos_gpios();
 }

src/mainboard/google/rauru/chromeos.c

@@ -1,8 +1,19 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <boot/coreboot_tables.h>
+#include <gpio.h>
+
+#include "gpio.h"
+
+void setup_chromeos_gpios(void)
+{
+	gpio_output(GPIO_XHCI_INIT_DONE, 0);
+}
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	/* TODO: add ChromeOS specific gpios */
+	struct lb_gpio chromeos_gpios[] = {
+		{ GPIO_XHCI_INIT_DONE.id, ACTIVE_HIGH, -1, "XHCI init done" },
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }

src/mainboard/google/rauru/gpio.h

@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __MAINBOARD_GOOGLE_RAURU_GPIO_H__
+#define __MAINBOARD_GOOGLE_RAURU_GPIO_H__
+
+#include <soc/gpio.h>
+
+#define GPIO_XHCI_INIT_DONE	GPIO(EINT28)
+
+void setup_chromeos_gpios(void);
+
+#endif