mb/starlabs/byte_adl: Re-organise GPIOs
Put the GPIOs into groups with clear comments. Change-Id: I7246fee8bdf111bc08c1335a90609e94356fc611 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87939 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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1 changed files with 9 additions and 10 deletions
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@ -49,11 +49,20 @@ const struct pad_config gpio_table[] = {
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PAD_CFG_GPO(GPP_E3, 1, DEEP), /* WiFi RF Kill */
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PAD_CFG_GPO(GPP_A13, 1, DEEP), /* Bluetooth RF Kill */
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/* LAN 1 */
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PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* Clock Request 2 */
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/* LAN 2 */
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PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* Clock Request 3 */
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/* Display */
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PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* eDP Hot Plug */
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PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* HDMI Hot Plug */
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PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* HDMI Clock */
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PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* HDMI Data */
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PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1), /* PMC Interrupt */
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PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML Clock */
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PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML Data */
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/* High-Definition Audio */
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PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
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@ -145,8 +154,6 @@ const struct pad_config gpio_table[] = {
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PAD_NC(GPP_B9, NONE),
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/* B10: Not Connected */
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PAD_NC(GPP_B10, NONE),
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/* B11: I2C PMC PD Interrupt Test Point 28 */
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PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1),
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/* B12: PM SLP S0 */
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PAD_NC(GPP_B12, NONE),
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/* B15: Not Connected */
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@ -174,10 +181,6 @@ const struct pad_config gpio_table[] = {
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PAD_NC(GPP_C3, NONE),
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/* C4: SML 0 Data */
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PAD_NC(GPP_C4, NONE),
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/* C6: SML 1 Clock */
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PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
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/* C7: SML 1 Data */
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PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
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/* C8: Not Connected */
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PAD_NC(GPP_C8, NONE),
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/* C9: Not Connected */
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@ -223,10 +226,6 @@ const struct pad_config gpio_table[] = {
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PAD_NC(GPP_D4, NONE),
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/* D6: Clock Request 1 Wireless LAN */
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PAD_NC(GPP_D6, NONE),
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/* D7: Clock Request 2 LAN 1 */
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PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
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/* D8: Clock Request 3 LAN 2 */
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PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
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/* D9: GSPI 2 FPS */
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PAD_NC(GPP_D9, NONE),
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/* D10: GSPI 2 Clock */
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