From f65f674343a2ef16501f0a40218f94082fa49e86 Mon Sep 17 00:00:00 2001 From: Maximilian Brune Date: Fri, 28 Nov 2025 21:51:50 +0100 Subject: [PATCH] mb/amd/birman: Increase flash size to 32M Update as per schematics. Since the commit wasn't actually tested on the mainboard, keep the BIOS region in the first 16M. Signed-off-by: Maximilian Brune Change-Id: I6d3cdbec82539007c6a0923c1f1415882dd9f2c1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/90266 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/mainboard/amd/birman/board_glinda.fmd | 4 ++-- src/mainboard/amd/birman/board_phoenix.fmd | 4 ++-- src/mainboard/amd/birman/chromeos_glinda.fmd | 4 ++-- src/mainboard/amd/birman/chromeos_phoenix.fmd | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/mainboard/amd/birman/board_glinda.fmd b/src/mainboard/amd/birman/board_glinda.fmd index 4f5598cd77..01340430cd 100644 --- a/src/mainboard/amd/birman/board_glinda.fmd +++ b/src/mainboard/amd/birman/board_glinda.fmd @@ -1,5 +1,5 @@ -FLASH 16M { - BIOS { +FLASH 32M { + BIOS 16M { EC_SIG 4K FMAP 4K COREBOOT(CBFS) diff --git a/src/mainboard/amd/birman/board_phoenix.fmd b/src/mainboard/amd/birman/board_phoenix.fmd index 4f5598cd77..01340430cd 100644 --- a/src/mainboard/amd/birman/board_phoenix.fmd +++ b/src/mainboard/amd/birman/board_phoenix.fmd @@ -1,5 +1,5 @@ -FLASH 16M { - BIOS { +FLASH 32M { + BIOS 16M { EC_SIG 4K FMAP 4K COREBOOT(CBFS) diff --git a/src/mainboard/amd/birman/chromeos_glinda.fmd b/src/mainboard/amd/birman/chromeos_glinda.fmd index 9cc4fbd050..bf10c06c3b 100644 --- a/src/mainboard/amd/birman/chromeos_glinda.fmd +++ b/src/mainboard/amd/birman/chromeos_glinda.fmd @@ -1,5 +1,5 @@ -FLASH 16M { - SI_BIOS { +FLASH 32M { + SI_BIOS 16M { WP_RO 8M { EC_SIG 4K RO_VPD(PRESERVE) 16K diff --git a/src/mainboard/amd/birman/chromeos_phoenix.fmd b/src/mainboard/amd/birman/chromeos_phoenix.fmd index 9cc4fbd050..bf10c06c3b 100644 --- a/src/mainboard/amd/birman/chromeos_phoenix.fmd +++ b/src/mainboard/amd/birman/chromeos_phoenix.fmd @@ -1,5 +1,5 @@ -FLASH 16M { - SI_BIOS { +FLASH 32M { + SI_BIOS 16M { WP_RO 8M { EC_SIG 4K RO_VPD(PRESERVE) 16K