From f63c3bb2978b6c3eb286180bb98ede01985c6ed8 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 29 Apr 2025 17:24:35 -0500 Subject: [PATCH] soc/intel/cannonlake: Hook up DPTF device to devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hook up `Device4Enable` FSP setting to devicetree state and drop its redundant devicetree setting `Device4Enable`. For boards where the register setting and PCI device status are not in agreement, use the register setting to determine the PCI device status, since that is what FSP uses. Modeled after similar patches for other SoCs. Change-Id: If17e6e86f6933b334e13f2c05ca513cef0998996 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/87483 Reviewed-by: Jérémy Compostella Tested-by: build bot (Jenkins) --- src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb | 4 +--- src/mainboard/google/drallion/variants/drallion/devicetree.cb | 1 - src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/puff/variants/baseboard/devicetree.cb | 2 +- src/mainboard/google/sarien/variants/arcada/devicetree.cb | 1 - src/mainboard/google/sarien/variants/sarien/devicetree.cb | 1 - src/mainboard/purism/librem_cnl/devicetree.cb | 4 +--- src/mainboard/system76/addw1/devicetree.cb | 4 +--- src/mainboard/system76/cml-u/devicetree.cb | 4 +--- src/mainboard/system76/gaze15/devicetree.cb | 4 +--- src/mainboard/system76/oryp5/devicetree.cb | 4 +--- src/mainboard/system76/oryp6/devicetree.cb | 4 +--- src/mainboard/system76/whl-u/devicetree.cb | 4 +--- src/soc/intel/cannonlake/chip.h | 2 -- src/soc/intel/cannonlake/fsp_params.c | 2 +- 15 files changed, 11 insertions(+), 32 deletions(-) diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb index 57b3b0f783..1dc9f1b8d9 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb +++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb @@ -68,9 +68,7 @@ chip soc/intel/cannonlake .backlight_off_delay_ms = 1, }" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref xhci on # USB2 diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 0485639654..b79c1cd1d7 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -46,7 +46,6 @@ chip soc/intel/cannonlake .tdp_pl2_override = 51, .psys_pmax = 140, }" - register "Device4Enable" = "1" register "AcousticNoiseMitigation" = "1" register "SlowSlewRateForIa" = "2" register "SlowSlewRateForGt" = "2" diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 00b4d83d21..0c4ebd7b65 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -35,7 +35,6 @@ chip soc/intel/cannonlake .tdp_pl1_override = 15, .tdp_pl2_override = 64, }" - register "Device4Enable" = "1" # Enable eDP device register "DdiPortEdp" = "1" # Enable HPD for DDI ports B/C @@ -195,6 +194,7 @@ chip soc/intel/cannonlake device domain 0 on device ref igpu on end + device ref dptf on end device ref thermal on end device ref xhci on chip drivers/usb/acpi diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb index ca3817f463..2e851c8e39 100644 --- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb @@ -35,7 +35,6 @@ chip soc/intel/cannonlake .tdp_pl1_override = 15, .tdp_pl2_override = 64, }" - register "Device4Enable" = "1" # Enable eDP device register "DdiPortEdp" = "1" # Enable HPD for DDI ports B/C @@ -195,6 +194,7 @@ chip soc/intel/cannonlake device domain 0 on device ref igpu on end + device ref dptf on end device ref thermal on end device ref xhci on chip drivers/usb/acpi diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index faec225f67..aed9743573 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -35,7 +35,6 @@ chip soc/intel/cannonlake .tdp_pl2_override = 51, .psys_pmax = 140, }" - register "Device4Enable" = "1" register "AcousticNoiseMitigation" = "1" register "SlowSlewRateForIa" = "2" register "SlowSlewRateForGt" = "2" diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 9608e52dae..c88bf6fff0 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -43,7 +43,6 @@ chip soc/intel/cannonlake .tdp_pl2_override = 51, .psys_pmax = 136, }" - register "Device4Enable" = "1" # Enable eDP device register "DdiPortEdp" = "1" # Enable HPD for DDI ports B/C diff --git a/src/mainboard/purism/librem_cnl/devicetree.cb b/src/mainboard/purism/librem_cnl/devicetree.cb index dfacdea686..44a995b801 100644 --- a/src/mainboard/purism/librem_cnl/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/devicetree.cb @@ -43,9 +43,7 @@ chip soc/intel/cannonlake # Actual device tree device domain 0 on device ref igpu on end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref xhci on end device ref sata on end diff --git a/src/mainboard/system76/addw1/devicetree.cb b/src/mainboard/system76/addw1/devicetree.cb index 07e960c50d..59491134c7 100644 --- a/src/mainboard/system76/addw1/devicetree.cb +++ b/src/mainboard/system76/addw1/devicetree.cb @@ -57,9 +57,7 @@ chip soc/intel/cannonlake register "PcieClkSrcClkReq[8]" = "8" end device ref igpu on end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref xhci on register "usb2_ports" = "{ diff --git a/src/mainboard/system76/cml-u/devicetree.cb b/src/mainboard/system76/cml-u/devicetree.cb index ed0a520d6e..14de0548ea 100644 --- a/src/mainboard/system76/cml-u/devicetree.cb +++ b/src/mainboard/system76/cml-u/devicetree.cb @@ -60,9 +60,7 @@ chip soc/intel/cannonlake device ref igpu on register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref cnvi_wifi on chip drivers/wifi/generic diff --git a/src/mainboard/system76/gaze15/devicetree.cb b/src/mainboard/system76/gaze15/devicetree.cb index cc76124695..1f8fb88c67 100644 --- a/src/mainboard/system76/gaze15/devicetree.cb +++ b/src/mainboard/system76/gaze15/devicetree.cb @@ -58,9 +58,7 @@ chip soc/intel/cannonlake device ref igpu on register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref xhci on register "usb2_ports" = "{ diff --git a/src/mainboard/system76/oryp5/devicetree.cb b/src/mainboard/system76/oryp5/devicetree.cb index e18ab9a397..ea9e14e436 100644 --- a/src/mainboard/system76/oryp5/devicetree.cb +++ b/src/mainboard/system76/oryp5/devicetree.cb @@ -66,9 +66,7 @@ chip soc/intel/cannonlake device ref igpu on register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref xhci on register "usb2_ports" = "{ diff --git a/src/mainboard/system76/oryp6/devicetree.cb b/src/mainboard/system76/oryp6/devicetree.cb index d6423f3c2e..e682fefe53 100644 --- a/src/mainboard/system76/oryp6/devicetree.cb +++ b/src/mainboard/system76/oryp6/devicetree.cb @@ -63,9 +63,7 @@ chip soc/intel/cannonlake device ref igpu on register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref xhci on register "usb2_ports" = "{ diff --git a/src/mainboard/system76/whl-u/devicetree.cb b/src/mainboard/system76/whl-u/devicetree.cb index 1686f95eda..5593b11b97 100644 --- a/src/mainboard/system76/whl-u/devicetree.cb +++ b/src/mainboard/system76/whl-u/devicetree.cb @@ -60,9 +60,7 @@ chip soc/intel/cannonlake device ref igpu on register "gfx" = "GMA_STATIC_DISPLAYS(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref thermal on end device ref xhci on register "usb2_ports" = "{ diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index c01f36fdac..591abbeaae 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -220,8 +220,6 @@ struct soc_intel_cannonlake_config { /* Gfx related */ bool SkipExtGfxScan; - bool Device4Enable; - /* CPU PL2/4 Config * Performance: Maximum PLs for maximum performance. * Baseline: Baseline PLs for balanced performance at lower power. diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 55a7c92aa0..993efbb107 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -631,7 +631,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) * the `Heci1Disabled` UPD to `0`. */ s_cfg->Heci1Disabled = 0; - s_cfg->Device4Enable = config->Device4Enable; + s_cfg->Device4Enable = is_devfn_enabled(SA_DEVFN_TS); /* Teton Glacier hybrid storage support */ s_cfg->TetonGlacierMode = config->TetonGlacierMode;