From f60d630727feb799d072d8756cc30789002cbb99 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sun, 16 Feb 2025 22:13:14 +0100 Subject: [PATCH] soc/amd/cezanne/acpi: Add ACP SMN access interface Add two ACPI methods to access a PSP mailbox interface via an SMN register pair in the host bridge. TEST=The AML code sequence written by this decompiles to the expected ASL code. Change-Id: I282f1fa2898f76659700450ee1f4b11f79d2d030 Signed-off-by: Matt DeVillier Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/77703 Tested-by: build bot (Jenkins) --- src/soc/amd/cezanne/Kconfig | 1 + src/soc/amd/cezanne/acpi.c | 41 +++++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 7b97ce731a..d0a2c5ec74 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -27,6 +27,7 @@ config SOC_AMD_CEZANNE select RTC select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACP_GEN1 + select SOC_AMD_COMMON_BLOCK_ACP_SOC_SPECIFIC_SSDT_ENTRY select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO select SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 4481c46ae8..140c1af9b4 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -4,6 +4,7 @@ #include #include +#include #include #include #include @@ -91,3 +92,43 @@ const acpi_cstate_t *get_cstate_config_data(size_t *size) *size = ARRAY_SIZE(cstate_cfg_table); return cstate_cfg_table; } + +static void acp_soc_write_smn_access_methods(void) +{ + acpigen_write_method_serialized("SMNR", 1); + acpigen_write_store_op_to_namestr(ARG0_OP, "\\_SB.PCI0.GNB.SMNA"); + acpigen_write_return_namestr("\\_SB.PCI0.GNB.SMND"); + acpigen_write_method_end(); + + acpigen_write_method_serialized("SMNW", 2); + acpigen_write_store_op_to_namestr(ARG0_OP, "\\_SB.PCI0.GNB.SMNA"); + acpigen_write_store_op_to_namestr(ARG1_OP, "\\_SB.PCI0.GNB.SMND"); + acpigen_write_method_end(); +} + +void acp_soc_write_ssdt_entry(const struct device *dev) +{ + /* + * SMN interface using the SMN OperationRegion on the host bridge + * + * Scope (\_SB.PCI0.GP41.ACPD) + * { + * Method (SMNR, 1, Serialized) + * { + * Store (Arg0, \_SB.PCI0.GNB.SMNA) + * Return (\_SB.PCI0.GNB.SMND) + * } + * + * Method (SMNW, 2, Serialized) + * { + * Store (Arg0, \_SB.PCI0.GNB.SMNA) + * Store (Arg1, \_SB.PCI0.GNB.SMND) + * } + * } + */ + acpigen_write_scope(acpi_device_path(dev)); + + acp_soc_write_smn_access_methods(); + + acpigen_write_scope_end(); +}