acpi: Add acpigen_write_OSC_pci_domain

Add dynamic PCI domain _OSC ASL generation codes, supporting both
PCIe and CXL domains.

Dynamic SSDT generation is used to generate a list of ASL device
objects based on FSP outputs (e.g. the SoC/SKU configurations)
and _OSC is a method inside these objects (hence it would be
straightforward to be generated altogether, plus some C codes
managed boot configs could be referenced as well).

This usage is optional. It is helpful for cases where the same
code set supports multiple SKUs/SoCs (difficult to be handled by
one set of static SSDT), and the CPU performance is good enough
to run SSDT generation logics with minimal costs.

TEST=intel/archercity CRB

Tested with https://review.coreboot.org/c/coreboot/+/81377.

Change-Id: I711ce5350d718e47feb2912555108801ad7f918d
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
This commit is contained in:
Shuo Liu 2024-03-21 21:22:03 +08:00 committed by Lean Sheng Tan
commit f4a12e1d39
2 changed files with 316 additions and 0 deletions

View file

@ -7,6 +7,13 @@
#include <device/pci_def.h>
#include <device/pci_type.h>
#define PCIE_NATIVE_HOTPLUG_CONTROL 0x01
#define SHPC_NATIVE_HOTPLUG_CONTROL 0x02
#define PCIE_PME_CONTROL 0x04
#define PCIE_AER_CONTROL 0x08
#define PCIE_CAP_STRUCTURE_CONTROL 0x10
#define PCIE_LTR_CONTROL 0x20
void acpigen_write_ADR_pci_devfn(pci_devfn_t devfn);
void acpigen_write_ADR_pci_device(const struct device *dev);
@ -16,4 +23,8 @@ void acpigen_write_PRT_source_entry(unsigned int pci_dev, unsigned int acpi_pin,
void pci_domain_fill_ssdt(const struct device *domain);
void acpigen_write_OSC_pci_domain(const struct device *domain, const bool is_cxl_domain);
uint32_t soc_get_granted_pci_features(const struct device *domain);
uint32_t soc_get_granted_cxl_features(const struct device *domain);
#endif /* ACPIGEN_PCI_H */