soc/mediatek/mt8189: Add USB host support

Correct XHCI and PHY register addresses and enable USB port 3 VBUS
to support USB host functionality.

BUG=b:379008996
BRANCH=none
TEST=build pass

Signed-off-by: Liu Liu <ot_liu.liu@mediatek.corp-partner.google.com>
Change-Id: I5f1b4b3eb178cb9a110b97a2763c8cff5cdf0ddd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87021
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Liu Liu 2024-12-10 17:10:53 +08:00 committed by Yidi Lin
commit f485c69d18
4 changed files with 49 additions and 2 deletions

View file

@ -17,6 +17,7 @@ romstage-y += emi.c
ramstage-y += emi.c
ramstage-y += soc.c
ramstage-y += ../common/usb.c usb.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8189/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/include

View file

@ -30,8 +30,9 @@ enum {
SFLASH_REG_BASE = IO_PHYS + 0x01018000,
PERICFG_AO_BASE = IO_PHYS + 0x01036000,
DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0103C000,
SSUSB_IPPC_BASE = IO_PHYS + 0x01203E00,
SSUSB_IPPC_BASE = IO_PHYS + 0x01263E00,
UFSHCI_BASE = IO_PHYS + 0x012B0000,
SSUSB_SIF_BASE = IO_PHYS + 0x01B00300,
MIPITX0_BASE = IO_PHYS + 0x01B40000,
IOCFG_LM_BASE = IO_PHYS + 0x01B50000,
EDP_BASE = IO_PHYS + 0x01B70000,
@ -42,7 +43,6 @@ enum {
IOCFG_BM2_BASE = IO_PHYS + 0x01D40000,
IOCFG_LT0_BASE = IO_PHYS + 0x01E20000,
IOCFG_LT1_BASE = IO_PHYS + 0x01E30000,
SSUSB_SIF_BASE = IO_PHYS + 0x01E80300,
IOCFG_RT_BASE = IO_PHYS + 0x01F20000,
DSI0_BASE = IO_PHYS + 0x04016000,
DISP_DVO0 = IO_PHYS + 0x04019000,

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@ -0,0 +1,29 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* This file is created based on MT8189 Functional Specification
* Chapter number: 9.5
*/
#ifndef SOC_MEDIATEK_MT8189_INCLUDE_SOC_USB_H
#define SOC_MEDIATEK_MT8189_INCLUDE_SOC_USB_H
#include <soc/usb_common.h>
struct ssusb_sif_port {
struct sif_u2_phy_com u2phy;
u32 reserved0[64 * 5];
struct sif_u3phyd u3phyd;
u32 reserved1[64];
struct sif_u3phya u3phya;
struct sif_u3phya_da u3phya_da;
u32 reserved2[64 * 3];
};
check_member(ssusb_sif_port, u3phyd, 0x600);
check_member(ssusb_sif_port, u3phya, 0x800);
check_member(ssusb_sif_port, u3phya_da, 0x900);
check_member(ssusb_sif_port, reserved2, 0xa00);
#define USB_PORT_NUMBER 1
#endif

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@ -0,0 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* This file is created based on MT8189 Functional Specification
* Chapter number: 9.5
*/
#include <device/mmio.h>
#include <gpio.h>
#include <soc/pll_common.h>
#include <soc/usb.h>
void mtk_usb_prepare(void)
{
/* enable P3 VBUS */
gpio_output(GPIO(USB3_DRV_VBUS), 1);
}