From f445127e2d9e223a5ef9117008a7ac7631a7980c Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Wed, 30 Apr 2014 14:51:38 -0700 Subject: [PATCH] nyan*: I2C: Implement bus clear when 'ARB_LOST' error occurs This is a fix for the 'Lost arb' we're seeing on Nyan* during reboot stress testing. It occurs when we are slamming the default PMIC registers with pmic_write_reg(). Currently, I've only captured this a few times, and the bus clear seemed to work, as the PMIC writes continued (where they'd hang the system before bus clear) for a couple of regs, then it hangs hard, no messages, no 2nd lost arb, etc. So I've added code to the PMIC write function that will reset the SoC if any I2C error occurs. That seems to recover OK, i.e. on the next reboot the PMIC writes all go thru, boot is OK, kernel loads, etc. BUG=chrome-os-partner:28323 BRANCH=nyan TEST=Tested on nyan. Built for nyan and nyan_big. Change-Id: I1ac5e3023ae22c015105b7f0fb7849663b4aa982 Signed-off-by: Tom Warren Reviewed-on: https://chromium-review.googlesource.com/197732 Reviewed-by: Julius Werner Reviewed-by: Jimmy Zhang --- src/mainboard/google/nyan/Makefile.inc | 3 +- src/mainboard/google/nyan/pmic.c | 14 ++++++-- src/mainboard/google/nyan/reset.c | 29 +++++++++++++++++ src/mainboard/google/nyan/reset.h | 25 ++++++++++++++ src/mainboard/google/nyan_big/Makefile.inc | 1 + src/mainboard/google/nyan_big/pmic.c | 14 ++++++-- src/mainboard/google/nyan_big/reset.c | 29 +++++++++++++++++ src/mainboard/google/nyan_big/reset.h | 25 ++++++++++++++ src/mainboard/google/nyan_blaze/Makefile.inc | 1 + src/mainboard/google/nyan_blaze/pmic.c | 14 ++++++-- src/mainboard/google/nyan_blaze/reset.c | 29 +++++++++++++++++ src/mainboard/google/nyan_blaze/reset.h | 25 ++++++++++++++ src/soc/nvidia/tegra/i2c.c | 34 +++++++++++++++++++- src/soc/nvidia/tegra/i2c.h | 17 ++++++++-- 14 files changed, 247 insertions(+), 13 deletions(-) create mode 100644 src/mainboard/google/nyan/reset.c create mode 100644 src/mainboard/google/nyan/reset.h create mode 100644 src/mainboard/google/nyan_big/reset.c create mode 100644 src/mainboard/google/nyan_big/reset.h create mode 100644 src/mainboard/google/nyan_blaze/reset.c create mode 100644 src/mainboard/google/nyan_blaze/reset.h diff --git a/src/mainboard/google/nyan/Makefile.inc b/src/mainboard/google/nyan/Makefile.inc index 7e24358f46..c1a33f030e 100644 --- a/src/mainboard/google/nyan/Makefile.inc +++ b/src/mainboard/google/nyan/Makefile.inc @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright 2013 Google Inc. +## Copyright 2014 Google Inc. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -30,6 +30,7 @@ subdirs-y += bct bootblock-y += boardid.c bootblock-y += bootblock.c bootblock-y += pmic.c +bootblock-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c diff --git a/src/mainboard/google/nyan/pmic.c b/src/mainboard/google/nyan/pmic.c index 205fb0028f..e981504bfe 100644 --- a/src/mainboard/google/nyan/pmic.c +++ b/src/mainboard/google/nyan/pmic.c @@ -18,6 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include @@ -25,6 +26,7 @@ #include "boardid.h" #include "pmic.h" +#include "reset.h" enum { AS3722_I2C_ADDR = 0x40 @@ -59,9 +61,15 @@ static struct as3722_init_reg init_list[] = { static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) { - i2c_writeb(bus, AS3722_I2C_ADDR, reg, val); - if (delay) - udelay(500); + if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) { + printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", + __func__, reg, val); + /* Reset the SoC on any PMIC write error */ + cpu_reset(); + } else { + if (delay) + udelay(500); + } } static void pmic_slam_defaults(unsigned bus) diff --git a/src/mainboard/google/nyan/reset.c b/src/mainboard/google/nyan/reset.c new file mode 100644 index 0000000000..7f1fff922a --- /dev/null +++ b/src/mainboard/google/nyan/reset.c @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include + +#include "reset.h" + +void cpu_reset(void) +{ + gpio_output(GPIO(I5), 0); + while(1); +} diff --git a/src/mainboard/google/nyan/reset.h b/src/mainboard/google/nyan/reset.h new file mode 100644 index 0000000000..debe83818b --- /dev/null +++ b/src/mainboard/google/nyan/reset.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ +#define __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ + +void cpu_reset(void); + +#endif /* __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ */ diff --git a/src/mainboard/google/nyan_big/Makefile.inc b/src/mainboard/google/nyan_big/Makefile.inc index e757184828..c1a33f030e 100644 --- a/src/mainboard/google/nyan_big/Makefile.inc +++ b/src/mainboard/google/nyan_big/Makefile.inc @@ -30,6 +30,7 @@ subdirs-y += bct bootblock-y += boardid.c bootblock-y += bootblock.c bootblock-y += pmic.c +bootblock-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c index 8ad4f32d8d..442968fd2f 100644 --- a/src/mainboard/google/nyan_big/pmic.c +++ b/src/mainboard/google/nyan_big/pmic.c @@ -18,6 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include @@ -25,6 +26,7 @@ #include "boardid.h" #include "pmic.h" +#include "reset.h" enum { AS3722_I2C_ADDR = 0x40 @@ -59,9 +61,15 @@ static struct as3722_init_reg init_list[] = { static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) { - i2c_writeb(bus, AS3722_I2C_ADDR, reg, val); - if (delay) - udelay(500); + if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) { + printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", + __func__, reg, val); + /* Reset the SoC on any PMIC write error */ + cpu_reset(); + } else { + if (delay) + udelay(500); + } } static void pmic_slam_defaults(unsigned bus) diff --git a/src/mainboard/google/nyan_big/reset.c b/src/mainboard/google/nyan_big/reset.c new file mode 100644 index 0000000000..7f1fff922a --- /dev/null +++ b/src/mainboard/google/nyan_big/reset.c @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include + +#include "reset.h" + +void cpu_reset(void) +{ + gpio_output(GPIO(I5), 0); + while(1); +} diff --git a/src/mainboard/google/nyan_big/reset.h b/src/mainboard/google/nyan_big/reset.h new file mode 100644 index 0000000000..debe83818b --- /dev/null +++ b/src/mainboard/google/nyan_big/reset.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ +#define __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ + +void cpu_reset(void); + +#endif /* __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ */ diff --git a/src/mainboard/google/nyan_blaze/Makefile.inc b/src/mainboard/google/nyan_blaze/Makefile.inc index e757184828..c1a33f030e 100644 --- a/src/mainboard/google/nyan_blaze/Makefile.inc +++ b/src/mainboard/google/nyan_blaze/Makefile.inc @@ -30,6 +30,7 @@ subdirs-y += bct bootblock-y += boardid.c bootblock-y += bootblock.c bootblock-y += pmic.c +bootblock-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c diff --git a/src/mainboard/google/nyan_blaze/pmic.c b/src/mainboard/google/nyan_blaze/pmic.c index 8ad4f32d8d..442968fd2f 100644 --- a/src/mainboard/google/nyan_blaze/pmic.c +++ b/src/mainboard/google/nyan_blaze/pmic.c @@ -18,6 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include @@ -25,6 +26,7 @@ #include "boardid.h" #include "pmic.h" +#include "reset.h" enum { AS3722_I2C_ADDR = 0x40 @@ -59,9 +61,15 @@ static struct as3722_init_reg init_list[] = { static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) { - i2c_writeb(bus, AS3722_I2C_ADDR, reg, val); - if (delay) - udelay(500); + if (i2c_writeb(bus, AS3722_I2C_ADDR, reg, val)) { + printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", + __func__, reg, val); + /* Reset the SoC on any PMIC write error */ + cpu_reset(); + } else { + if (delay) + udelay(500); + } } static void pmic_slam_defaults(unsigned bus) diff --git a/src/mainboard/google/nyan_blaze/reset.c b/src/mainboard/google/nyan_blaze/reset.c new file mode 100644 index 0000000000..7f1fff922a --- /dev/null +++ b/src/mainboard/google/nyan_blaze/reset.c @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include + +#include "reset.h" + +void cpu_reset(void) +{ + gpio_output(GPIO(I5), 0); + while(1); +} diff --git a/src/mainboard/google/nyan_blaze/reset.h b/src/mainboard/google/nyan_blaze/reset.h new file mode 100644 index 0000000000..debe83818b --- /dev/null +++ b/src/mainboard/google/nyan_blaze/reset.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ +#define __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ + +void cpu_reset(void); + +#endif /* __MAINBOARD_GOOGLE_NYAN_BOOTBLOCK_H__ */ diff --git a/src/soc/nvidia/tegra/i2c.c b/src/soc/nvidia/tegra/i2c.c index 9a4d71bc3c..6c269cfaed 100644 --- a/src/soc/nvidia/tegra/i2c.c +++ b/src/soc/nvidia/tegra/i2c.c @@ -23,9 +23,36 @@ #include #include #include - #include "i2c.h" +static void do_bus_clear(int bus) +{ + struct tegra_i2c_bus_info *info = &tegra_i2c_info[bus]; + struct tegra_i2c_regs * const regs = info->base; + uint32_t bc; + + // BUS CLEAR regs (from TRM): + // 1. Reset the I2C controller (already done) + // 2. Set the # of clock pulses required (using default of 9) + // 3. Select STOP condition (using default of 1 = STOP) + // 4. Set TERMINATE condition (1 = THRESHOLD) + bc = read32(®s->bus_clear_config); + bc |= I2C_BUS_CLEAR_CONFIG_BC_TERMINATE_THRESHOLD; + write32(bc, ®s->bus_clear_config); + // 4.1 Set MSTR_CONFIG_LOAD and wait for clear + write32(I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD_ENABLE, ®s->config_load); + do { + printk(BIOS_DEBUG, "%s: wait for MSTR_CONFIG_LOAD to clear\n", + __func__); + } while (read32(®s->config_load) & I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD_ENABLE); + // 5. Set ENABLE to start the bus clear op + write32(bc | I2C_BUS_CLEAR_CONFIG_BC_ENABLE, ®s->bus_clear_config); + do { + printk(BIOS_DEBUG, "%s: wait for bus clear completion\n", + __func__); + } while (read32(®s->bus_clear_config) & I2C_BUS_CLEAR_CONFIG_BC_ENABLE); +} + static int tegra_i2c_send_recv(int bus, int read, uint32_t *headers, int header_words, uint8_t *data, int data_len) @@ -91,6 +118,11 @@ static int tegra_i2c_send_recv(int bus, int read, "%s: Lost arbitration.\n", __func__); info->reset_func(info->reset_bit); + + /* Use Tegra bus clear registers to unlock SDA */ + do_bus_clear(bus); + + /* Return w/error, let caller decide what to do */ return -1; } } diff --git a/src/soc/nvidia/tegra/i2c.h b/src/soc/nvidia/tegra/i2c.h index 03a6d66e1f..6347fff8ad 100644 --- a/src/soc/nvidia/tegra/i2c.h +++ b/src/soc/nvidia/tegra/i2c.h @@ -110,6 +110,19 @@ enum { 0xf << I2C_FIFO_STATUS_RX_FIFO_FULL_CNT_SHIFT }; +enum { + I2C_BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD_SHIFT = 16, + I2C_BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD_MASK = + 0x7f << I2C_BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD_SHIFT, + I2C_BUS_CLEAR_CONFIG_BC_STOP_COND_STOP = 0x1 << 2, + I2C_BUS_CLEAR_CONFIG_BC_TERMINATE_THRESHOLD = 0x1 << 1, + I2C_BUS_CLEAR_CONFIG_BC_ENABLE = 0x1 << 0, + + I2C_BUS_CLEAR_STATUS_CLEARED = 0x1 << 0, + + I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD_ENABLE = 0x1 << 0 +}; + struct tegra_i2c_bus_info { void *base; uint32_t reset_bit; @@ -153,8 +166,8 @@ struct tegra_i2c_regs { uint32_t slv_packet_status; uint32_t bus_clear_config; uint32_t bus_clear_status; - uint32_t spare; + uint32_t config_load; }; -check_member(tegra_i2c_regs, bus_clear_status, 0x88); +check_member(tegra_i2c_regs, config_load, 0x8C); #endif /* __SOC_NVIDIA_TEGRA_I2C_H__ */