soc/intel/ptl: Add PCIe ACPI support for Wildcat Lake SoC

This commit introduces PCI device details specific to Wildcat Lake
within the Panther Lake ACPI code, using conditional compilation
to differentiate configurations.

Key changes:
 - Create separate ASL files for Panther Lake (`ptl_pcie.asl`) and
   Wildcat Lake (`wcl_pcie.asl`) PCIe port configurations.
 - Introduce conditional compilation to include Panther Lake or
   Wildcat Lake ASL files.
 - Wildcat Lake-specific changes compared to Panther Lake:
       - Remove following
         - PCIe RP : 00:1c.4 to 00:1c.7
                   : 00:06.2 & 00:06.3
References:
- Wildcat Lake Processor EDS Volume 1 (#842271)
- Wildcat Lake External Design Specification (EDS) Volume 2 (#829345)

BUG=b:394208231
TEST=Build Ocelot and Fatcat and verify it compiles  without any error.

Change-Id: I7f6c4f80a811c596824734d749b8d1c4864ccb9b
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88109
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Appukuttan V K 2025-06-16 13:08:11 +05:30 committed by Subrata Banik
commit f3f9c0bd8e
3 changed files with 315 additions and 204 deletions

View file

@ -96,208 +96,9 @@ Method (IRQM, 1, Serialized) {
}
}
Device (RP01)
{
Name (_ADR, 0x001C0000)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP02)
{
Name (_ADR, 0x001C0001)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP03)
{
Name (_ADR, 0x001C0002)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP04)
{
Name (_ADR, 0x001C0003)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP05)
{
Name (_ADR, 0x001C0004)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP06)
{
Name (_ADR, 0x001C0005)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP07)
{
Name (_ADR, 0x001C0006)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP08)
{
Name (_ADR, 0x001C0007)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP09)
{
Name (_ADR, 0x00060000)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP10)
{
Name (_ADR, 0x00060001)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
#if CONFIG(SOC_INTEL_PANTHERLAKE_H)
Device (RP11)
{
Name (_ADR, 0x00060002)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP12)
{
Name (_ADR, 0x00060003)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
/* PCIE Ports */
#if (CONFIG(SOC_INTEL_WILDCATLAKE))
#include "wcl_pcie.asl"
#else
#include "ptl_pcie.asl"
#endif

View file

@ -0,0 +1,207 @@
/* SPDX-License-Identifier: GPL-2.0-only */
Device (RP01)
{
Name (_ADR, 0x001C0000)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP02)
{
Name (_ADR, 0x001C0001)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP03)
{
Name (_ADR, 0x001C0002)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP04)
{
Name (_ADR, 0x001C0003)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP05)
{
Name (_ADR, 0x001C0004)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP06)
{
Name (_ADR, 0x001C0005)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP07)
{
Name (_ADR, 0x001C0006)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP08)
{
Name (_ADR, 0x001C0007)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP09)
{
Name (_ADR, 0x00060000)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP10)
{
Name (_ADR, 0x00060001)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
#if CONFIG(SOC_INTEL_PANTHERLAKE_H)
Device (RP11)
{
Name (_ADR, 0x00060002)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP12)
{
Name (_ADR, 0x00060003)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
#endif

View file

@ -0,0 +1,103 @@
/* SPDX-License-Identifier: GPL-2.0-only */
Device (RP01)
{
Name (_ADR, 0x001C0000)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP02)
{
Name (_ADR, 0x001C0001)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP03)
{
Name (_ADR, 0x001C0002)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP04)
{
Name (_ADR, 0x001C0003)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP05)
{
Name (_ADR, 0x00060000)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}
Device (RP06)
{
Name (_ADR, 0x00060001)
OperationRegion (RPCS, PCI_Config, 0x4c, 4)
Field (RPCS, AnyAcc, NoLock, Preserve)
{
, 24,
RPPN, 8, /* Root Port Number */
}
Method (_PRT)
{
Return (IRQM (RPPN))
}
}