soc/intel/common/block/smm: drain sync smi around smmstore
Drain pending SPI sync SMIs before dropping write protect for SMMSTORE and once more after the command runs. This keeps a stale sync status from leaking into the next request. Change-Id: I7ba21719a6dafa926b0d5986a253da9cff52575a Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/91726 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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1 changed files with 16 additions and 1 deletions
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@ -66,6 +66,20 @@ __weak void mainboard_smi_espi_handler(void)
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/* no-op */
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}
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#define SMMSTORE_SYNC_SMI_SETTLE_USEC 50
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#define SMMSTORE_SYNC_SMI_CLEAR_TRIES 8
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static void smmstore_drain_sync_smi(void)
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{
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int i;
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for (i = 0; i < SMMSTORE_SYNC_SMI_CLEAR_TRIES; i++) {
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if (!fast_spi_clear_sync_smi_status())
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return;
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udelay(SMMSTORE_SYNC_SMI_SETTLE_USEC);
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}
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}
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/* Inherited from cpu/x86/smm.h resulting in a different signature */
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void southbridge_smi_set_eos(void)
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{
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@ -279,12 +293,13 @@ static void southbridge_smi_store(
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* bit is a must prior setting SPI_BIOS_CONTROL_WPD" bit
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* to avoid 3-strike error.
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*/
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fast_spi_clear_sync_smi_status();
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smmstore_drain_sync_smi();
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fast_spi_disable_wp();
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}
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/* drivers/smmstore/smi.c */
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ret = smmstore_exec(sub_command, (void *)(uintptr_t)reg_ebx);
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smmstore_drain_sync_smi();
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save_state_ops->set_reg(RAX, node, &ret, sizeof(ret));
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if (wp_enabled) {
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