From f37c28c24b026e7459134ce01e803856684b5f67 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 12 Nov 2008 22:43:50 +0000 Subject: [PATCH] I'm committing often as I don't want people to run over each other (and I am waiting on BlueGene to schedule me and keep getting called away ... waiting for 1024 procs takes patience!) Signed-off-by: Ronald G. Minnich Acked-by: Ronald G. Minnich git-svn-id: svn://coreboot.org/repository/coreboot-v3@1008 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- arch/x86/intel/core2/stage0.S | 15 +++++++-------- mainboard/kontron/986lcd-m/Makefile | 2 +- northbridge/intel/i945/Makefile | 7 +------ northbridge/intel/i945/northbridge.c | 3 ++- southbridge/intel/i82801gx/Makefile | 4 ++-- southbridge/intel/i82801gx/usb.c | 1 + 6 files changed, 14 insertions(+), 18 deletions(-) diff --git a/arch/x86/intel/core2/stage0.S b/arch/x86/intel/core2/stage0.S index 7bc402e92b..893ae19aeb 100644 --- a/arch/x86/intel/core2/stage0.S +++ b/arch/x86/intel/core2/stage0.S @@ -18,12 +18,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define CACHE_AS_RAM_SIZE DCACHE_RAM_SIZE -#define CACHE_AS_RAM_BASE DCACHE_RAM_BASE -#define post_code(x) intel_chip_post_macro(x) +#define ASSEMBLY +#define CACHE_AS_RAM_SIZE CONFIG_CARSIZE +#define CACHE_AS_RAM_BASE CONFIG_CARBASE -#include -#include +#include #include @@ -67,7 +66,7 @@ __protected_stage0: cache_as_ram: #if USE_FALLBACK_IMAGE == 1 - post_code(0x20) + port80_post(0x20) /* Send INIT IPI to all excluding ourself */ movl $0x000C4500, %eax @@ -164,11 +163,11 @@ clear_mtrrs: movl %esp, %ebp pushl %eax - post_code(0x23) + port80_post(0x23) call stage1_phase1 - post_code(0x2f) + port80_post(0x2f) error: hlt jmp error diff --git a/mainboard/kontron/986lcd-m/Makefile b/mainboard/kontron/986lcd-m/Makefile index 54bfe02031..ba3040e8c0 100644 --- a/mainboard/kontron/986lcd-m/Makefile +++ b/mainboard/kontron/986lcd-m/Makefile @@ -26,7 +26,7 @@ STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \ INITRAM_SRC= $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ - $(src)/northbridge/northbridge/intel/i945/raminit.c \ + $(src)/northbridge/intel/i945/raminit.c \ STAGE2_MAINBOARD_SRC = diff --git a/northbridge/intel/i945/Makefile b/northbridge/intel/i945/Makefile index 6faa5d59bc..e47954ac05 100644 --- a/northbridge/intel/i945/Makefile +++ b/northbridge/intel/i945/Makefile @@ -21,11 +21,6 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I945),y) -STAGE2_CHIPSET_SRC += $(src)/northbridge/intel/i945/get_sblk_pci1234.c \ - $(src)/northbridge/intel/i945/common.c \ - $(src)/northbridge/intel/i945/cpu.c \ - $(src)/northbridge/intel/i945/domain.c \ - $(src)/northbridge/intel/i945/pci.c \ - $(src)/northbridge/intel/i945/util.c +STAGE2_CHIPSET_SRC += $(src)/northbridge/intel/i945/northbridge.c \ endif diff --git a/northbridge/intel/i945/northbridge.c b/northbridge/intel/i945/northbridge.c index 4ab29c4717..a1387caa4a 100644 --- a/northbridge/intel/i945/northbridge.c +++ b/northbridge/intel/i945/northbridge.c @@ -259,10 +259,11 @@ static void cpu_bus_noop(struct device * dev) { } +#warning get a number of the 945 mc struct device_operations i945_mc_ops = { .id = {.type = DEVICE_ID_PCI, {.pci = {.vendor = PCI_VENDOR_ID_INTEL, - .device = anu,ber}}}, + .device = 0x1233}}}, .constructor = default_device_constructor, .phase4_read_resources = cpu_bus_noop, .phase4_set_resources = cpu_bus_noop, diff --git a/southbridge/intel/i82801gx/Makefile b/southbridge/intel/i82801gx/Makefile index 0bac58db36..5e623fcb1f 100644 --- a/southbridge/intel/i82801gx/Makefile +++ b/southbridge/intel/i82801gx/Makefile @@ -32,13 +32,13 @@ STAGE2_CHIPSET_SRC += \ $(src)/southbridge/intel/i82801gx/pcie.c \ $(src)/southbridge/intel/i82801gx/sata.c \ $(src)/southbridge/intel/i82801gx/smbus.c \ - $(src)/southbridge/intel/i82801gx/libsmbus.c \ $(src)/southbridge/intel/i82801gx/usb_ehci.c \ $(src)/southbridge/intel/i82801gx/usb.c \ $(src)/southbridge/intel/i82801gx/watchdog.c +# $(src)/southbridge/intel/i82801gx/libsmbus.c \ STAGE0_CHIPSET_SRC += \ $(src)/southbridge/intel/i82801gx/stage1_smbus.c \ - $(src)/southbridge/intel/i82801gx/libsmbus.c \ +# $(src)/southbridge/intel/i82801gx/libsmbus.c \ endif diff --git a/southbridge/intel/i82801gx/usb.c b/southbridge/intel/i82801gx/usb.c index 477b9abb6d..c66be1852a 100644 --- a/southbridge/intel/i82801gx/usb.c +++ b/southbridge/intel/i82801gx/usb.c @@ -46,6 +46,7 @@ static void usb_init(struct device *dev) printk(BIOS_DEBUG, "done.\n"); } +void i82801gx_enable(struct device * dev); /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */ struct device_operations i82801gb_usb1 = {