tree: Use boolean for skip_ext_gfx_scan

Change-Id: I569b9a69add341bcefe6bd5356b01a95a4e97286
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84154
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
This commit is contained in:
Elyes Haouas 2024-08-31 10:13:47 +02:00
commit f344afb670
5 changed files with 5 additions and 5 deletions

View file

@ -70,7 +70,7 @@ chip soc/intel/meteorlake
register "energy_perf_pref_value" = "0x73"
# Set on-board graphics as primary display
register "skip_ext_gfx_scan" = "1"
register "skip_ext_gfx_scan" = "true"
register "serial_io_uart_mode" = "{
[PchSerialIoIndexUART0] = PchSerialIoPci,

View file

@ -68,7 +68,7 @@ chip soc/intel/meteorlake
register "sagv_gear[3]" = "2"
# Set on-board graphics as primary display
register "skip_ext_gfx_scan" = "1"
register "skip_ext_gfx_scan" = "true"
register "serial_io_uart_mode" = "{
[PchSerialIoIndexUART0] = PchSerialIoPci,

View file

@ -70,7 +70,7 @@ chip soc/intel/meteorlake
register "energy_perf_pref_value" = "0x73"
# Set on-board graphics as primary display
register "skip_ext_gfx_scan" = "1"
register "skip_ext_gfx_scan" = "true"
register "serial_io_uart_mode" = "{
[PchSerialIoIndexUART0] = PchSerialIoSkipInit,

View file

@ -65,7 +65,7 @@ chip soc/intel/meteorlake
register "sagv_gear[3]" = "2"
# Set on-board graphics as primary display
register "skip_ext_gfx_scan" = "1"
register "skip_ext_gfx_scan" = "true"
register "serial_io_uart_mode" = "{
[PchSerialIoIndexUART0] = PchSerialIoPci,

View file

@ -179,7 +179,7 @@ struct soc_intel_pantherlake_config {
IGD_SM_56MB = 0xFD,
IGD_SM_60MB = 0xFE,
} IgdDvmt50PreAlloc;
uint8_t skip_ext_gfx_scan;
bool skip_ext_gfx_scan;
/* CNVi WiFi Core Enable/Disable */
bool cnvi_wifi_core;