This now compiles (with many warnings but ...) and tries to build a rom

image, and fails: 
  LAR     build/coreboot.rom
Bootblock coreboot.bootblock does not appear to be a bootblock.
Error adding the bootblock to the LAR.
make: *** [/home/rminnich/src/bios/coreboot-v3/build/coreboot.rom] Error 
1

Next step is to get rid of all warnings that are not #warning. 

Then it is on to simnow. 

Anyone who wants to work on the warnings is most welcome to. 

DBE62 still builds with no problems. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@808 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-08-24 02:59:05 +00:00
commit f28a44eb48
19 changed files with 91 additions and 87 deletions

View file

@ -24,7 +24,7 @@
unsigned int hypertransport_scan_chain(struct bus *bus,
unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unit_base, unsigned offset_unitid);
unsigned int ht_scan_bridge(struct device *dev, unsigned int max);
extern struct device_operations default_ht_ops_bus;
extern const struct device_operations default_ht_ops_bus;
#define HT_IO_HOST_ALIGN 4096
#define HT_MEM_HOST_ALIGN (1024*1024)