From f2788e963ff5668ecb642782a6f6e64adca8a58a Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 17 Sep 2025 14:37:01 +0200 Subject: [PATCH] device: Rename PCI_EXP_SEC_CAP_ID -> PCI_CAP_ID_SEC_PCIE Rename the define for "Secondary PCI Express Extended Capability" and move it close to the other existing defines. Cosmetic change. No functionality was changed. Signed-off-by: Maximilian Brune Change-Id: I3b1ce6820f508661d3241c36c90febe0c73b7a5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/90694 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/device/pciexp_device.c | 2 +- src/include/device/pci_def.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index a5f162e8ac..1b8f8ad79b 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -692,7 +692,7 @@ static void clear_lane_error_status(struct device *dev) u32 reg32; u16 pos; - pos = pciexp_find_extended_cap(dev, PCI_EXP_SEC_CAP_ID, 0); + pos = pciexp_find_extended_cap(dev, PCI_CAP_ID_SEC_PCIE, 0); if (pos == 0) return; diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index 6748b356b7..0838128057 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -204,6 +204,7 @@ #define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */ #define PCI_CAP_ID_PCIE 0x10 /* PCI Express */ #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ +#define PCI_CAP_ID_SEC_PCIE 0x19 /* Secondary PCI Express Extended Capability */ #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ @@ -481,7 +482,6 @@ #define PCIE_EXT_CAP_SRIOV_ID 0x0010 /* Secondary PCI Express Extended Capability Structure */ -#define PCI_EXP_SEC_CAP_ID 0x19 #define PCI_EXP_SEC_LNK_CTL3 4 /* Link Control 3 */ #define PCI_EXP_SEC_LANE_ERR_STATUS 8 /* Lane Error Status */