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soc/intel/xeon_sp: Add acpigen_write_PRT_pre_routed

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acpigen_write_PRT_pre_routed writes _PRT covering all direct
subordinate child devices based on interrupt line/pin info from
their PCI configuration spaces. It is required that IRQ routing
and PCI configuration space update to be done ahead of time.

TEST=Build and boot on intel/archercity CRB

Change-Id: Ic54888f76d2ec9804442bec5aec54267d9a16d7c
Signed-off-by: Lu, Pen-ChunX <pen-chunx.lu@intel.com>
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82253
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Lu, Pen-ChunX 2024-06-15 00:48:28 +08:00 • committed by Lean Sheng Tan
commit f214acd6e5
2 changed files with 42 additions and 0 deletions
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41
src/soc/intel/xeon_sp/acpi.c
View file

@ -8,6 +8,7 @@
#include <soc/chip_common.h>
#include <soc/pci_devs.h>
#include <soc/util.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
@ -193,3 +194,43 @@ void acpigen_write_pci_root_port(const struct device *rp)
acpigen_pop_len();
acpigen_pop_len();
}
void acpigen_write_PRT_pre_routed(const struct device *br)
{
int dev_num = 0;
uint32_t routed_dev_bitmap = 0;
char *entry_count;
if (!is_pci_bridge(br))
return;
const char *acpi_scope = acpi_device_path(br);
if (!acpi_scope)
return;
acpigen_write_scope(acpi_scope);
acpigen_write_name("_PRT");
entry_count = acpigen_write_package(0);
struct device *dev = NULL;
while ((dev = dev_bus_each_child(br->downstream, dev))) {
if (!is_pci(dev))
continue;
dev_num = PCI_SLOT(dev->path.pci.devfn);
if (routed_dev_bitmap & (1 << dev_num))
continue;
uint8_t int_line = pci_read_config8(dev, PCI_INTERRUPT_LINE);
uint8_t int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN);
if ((int_pin > PCI_INT_MAX) || (int_pin < PCI_INT_A))
continue;
acpigen_write_PRT_GSI_entry(dev_num, int_pin - PCI_INT_A, int_line);
(*entry_count)++;
routed_dev_bitmap |= (1 << dev_num);
}
acpigen_pop_len();
acpigen_pop_len();
}

1
src/soc/intel/xeon_sp/include/soc/acpi.h
View file

@ -39,5 +39,6 @@ void acpigen_write_OSC_pci_domain_fixed_caps(const struct device *domain,
const bool is_cxl_domain,
const uint32_t granted_cxl_features);
void acpigen_write_pci_root_port(const struct device *rp);
void acpigen_write_PRT_pre_routed(const struct device *br);
#endif /* _SOC_ACPI_H_ */