New mechanism to define SRAM/memory map with automatic bounds checking

This patch creates a new mechanism to define the static memory layout
(primarily in SRAM) for a given board, superseding the brittle mass of
Kconfigs that we were using before. The core part is a memlayout.ld file
in the mainboard directory (although boards are expected to just include
the SoC default in most cases), which is the primary linker script for
all stages (though not rmodules for now). It uses preprocessor macros
from <memlayout.h> to form a different valid linker script for all
stages while looking like a declarative, boilerplate-free map of memory
addresses to the programmer. Linker asserts will automatically guarantee
that the defined regions cannot overlap. Stages are defined with a
maximum size that will be enforced by the linker. The file serves to
both define and document the memory layout, so that the documentation
cannot go missing or out of date.

The mechanism is implemented for all boards in the ARM, ARM64 and MIPS
architectures, and should be extended onto all systems using SRAM in the
future. The CAR/XIP environment on x86 has very different requirements
and the layout is generally not as static, so it will stay like it is
and be unaffected by this patch (save for aligning some symbol names for
consistency and sharing the new common ramstage linker script include).

BUG=None
TEST=Booted normally and in recovery mode, checked suspend/resume and
the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and
Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies
with ToT and looked for red flags.

Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/213370
This commit is contained in:
Julius Werner 2014-08-20 15:29:56 -07:00 committed by chrome-internal-fetch
commit f1e2028e7e
135 changed files with 1378 additions and 1781 deletions

View file

@ -251,20 +251,6 @@ config CONSOLE_CBMEM_BUFFER_SIZE
value (64K or 0x10000 bytes) is large enough to accommodate
even the BIOS_SPEW level.
config CBMEM_CONSOLE_PRERAM_BASE
hex
depends on CONSOLE_CBMEM && CONSOLE_FIXED_PRERAM_CBMEM_BUFFER
config CONSOLE_PRERAM_BUFFER_SIZE
depends on CONSOLE_CBMEM
hex "Room allocated for console output before RAM is initialized"
default 0xc00
help
Console is used before RAM is initialized. This is the room reserved
in the DCACHE based RAM, SRAM, etc. to keep console output before it
can be saved in a CBMEM buffer. 3K bytes should be enough even for
the BIOS_SPEW level.
choice
prompt "Maximum console log level"