diff --git a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb
index ae9f1c0ab4..ae514c2f3e 100644
--- a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb
+++ b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/overridetree.cb
@@ -17,6 +17,12 @@ chip soc/intel/alderlake
 		[1] = 1,
 	}"
 
+	# Enable IBECC for the complete memory
+	register "ibecc" = "{
+		.enable = 1,
+		.mode = IBECC_MODE_ALL
+	}"
+
 	register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"	# Port1
 	register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"	# Port2
 	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Onboard USB