drivers/soundwire/cs42l43: Support Cirrus Logic CS42L43 codec
CS42L43 is a PC Codec with headphone and class D speaker drivers.
The driver was written based on the datasheet for CS42L43 part and
generates the audio SSDT information.
CS42L43 supports DisCo Version v2.1, but coreboot currently only
supports DisCo v1.0, so ACPI is only generated based on DisCo v1.0.
CS42L43 also supports the SDCA v1.0 Specification (from DisCo v2.1)
is also not currently supported by coreboot, therefore SDCA ACPI
properties are also not generated.
This is currently only tested using QEMU using example configuration:
chip drivers/soundwire/cs42l43
# SoundWire Link 0 ID 1
register "desc" = ""CODEC""
register "sub" = ""1337""
device generic 0.1 on end
end
Which produces the ACPI:
Device (SW01)
{
Name (_ADR, 0x00003101FA424301) // _ADR: Address
Name (_DDN, "CODEC") // _DDN: DOS Device Name
Name (_SUB, "1337") // _SUB: Subsystem ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Name (_DSD, Package (0x04) // _DSD: Device-Specific Data
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */,
Package (0x0F)
{
Package (0x02)
{
"mipi-sdw-sw-interface-revision",
0x00010000
},
Package (0x02)
{
"mipi-sdw-wake-up-unavailable",
Zero
},
Package (0x02)
{
"mipi-sdw-test-mode-supported",
Zero
},
Package (0x02)
{
"mipi-sdw-clock-stop-mode1-supported",
Zero
},
Package (0x02)
{
"mipi-sdw-simplified-clockstopprepare-sm-supported",
Zero
},
Package (0x02)
{
"mipi-sdw-clockstopprepare-timeout",
Zero
},
Package (0x02)
{
"mipi-sdw-clockstopprepare-hard-reset-behavior",
Zero
},
Package (0x02)
{
"mipi-sdw-slave-channelprepare-timeout",
Zero
},
Package (0x02)
{
"mipi-sdw-highPHY-capable",
Zero
},
Package (0x02)
{
"mipi-sdw-paging-supported",
One
},
Package (0x02)
{
"mipi-sdw-bank-delay-supported",
Zero
},
Package (0x02)
{
"mipi-sdw-port15-read-behavior",
Zero
},
Package (0x02)
{
"mipi-sdw-master-count",
Zero
},
Package (0x02)
{
"mipi-sdw-source-port-list",
0x06
},
Package (0x02)
{
"mipi-sdw-sink-port-list",
0x60
}
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b") /* Hierarchical Data Extension */,
Package (0x06)
{
Package (0x02)
{
"mipi-sdw-port-bra-mode-0",
"BRA0"
},
Package (0x02)
{
"mipi-sdw-dp-0-subproperties",
"DP0"
},
Package (0x02)
{
"mipi-sdw-dp-2-source-subproperties",
"SRC2"
},
Package (0x02)
{
"mipi-sdw-dp-5-sink-subproperties",
"SNK5"
},
Package (0x02)
{
"mipi-sdw-dp-1-sink-subproperties",
"SNK1"
},
Package (0x02)
{
"mipi-sdw-dp-6-source-subproperties",
"SRC6"
}
}
})
Name (BRA0, Package (0x02)
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */,
Package (0x04)
{
Package (0x02)
{
"mipi-sdw-bra-mode-min-bus-frequency",
Zero
},
Package (0x02)
{
"mipi-sdw-bra-mode-max-bus-frequency",
Zero
},
Package (0x02)
{
"mipi-sdw-bra-mode-max-data-per-frame",
0x01D6
},
Package (0x02)
{
"mipi-sdw-bra-mode-min-us-between-transactions",
Zero
}
}
})
Name (DP0, Package (0x04)
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */,
Package (0x07)
{
Package (0x02)
{
"mipi-sdw-port-wordlength-configs",
Package (0x03)
{
0x08,
0x10,
0x18
}
},
Package (0x02)
{
"mipi-sdw-bra-flow-controlled",
One
},
Package (0x02)
{
"mipi-sdw-bra-imp-def-response-supported",
One
},
Package (0x02)
{
"mipi-sdw-bra-role-supported",
One
},
Package (0x02)
{
"mipi-sdw-simplified-channel-prepare-sm",
Zero
},
Package (0x02)
{
"mipi-sdw-imp-def-dp0-interrupts-supported",
Zero
},
Package (0x02)
{
"mipi-sdw-imp-def-bpt-supported",
Zero
}
},
ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b") /* Hierarchical Data Extension */,
Package (0x01)
{
Package (0x02)
{
"mipi-sdw-port-bra-mode-0",
"BRA0"
}
}
})
Name (SRC2, Package (0x02)
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */,
Package (0x0C)
{
Package (0x02)
{
"mipi-sdw-data-port-type",
Zero
},
Package (0x02)
{
"mipi-sdw-max-grouping-supported",
Zero
},
Package (0x02)
{
"mipi-sdw-imp-def-dpn-interrupts-supported",
Zero
},
Package (0x02)
{
"mipi-sdw-modes-supported",
One
},
Package (0x02)
{
"mipi-sdw-max-async-buffer",
Zero
},
Package (0x02)
{
"mipi-sdw-block-packing-mode",
One
},
Package (0x02)
{
"mipi-sdw-port-encoding-type",
One
},
Package (0x02)
{
"mipi-sdw-port-wordlength-configs",
Package (0x03)
{
0x08,
0x10,
0x18
}
},
Package (0x02)
{
"mipi-sdw-simplified-channelprepare-sm",
Zero
},
Package (0x02)
{
"mipi-sdw-port-channelprepare-timeout",
Zero
},
Package (0x02)
{
"mipi-sdw-channel-number-list",
Package (0x02)
{
Zero,
One
}
},
Package (0x02)
{
"mipi-sdw-channel-combination-list",
Package (0x03)
{
0x03,
0x02,
One
}
}
}
})
Name (SNK5, Package (0x02)
{
[... Same as SRC2 ...]
})
Name (SNK1, Package (0x02)
{
[... Same as SRC2 except:]
Package (0x02)
{
"mipi-sdw-channel-number-list",
Package (0x04)
{
Zero,
One,
0x02,
0x03
}
},
Package (0x02)
{
"mipi-sdw-channel-combination-list",
Package (0x04)
{
One,
0x03,
0x07,
0x0F
}
}
[ Same as SRC2 ...]
}
})
Name (SRC6, Package (0x02)
{
[... Same as SRC2 ...]
})
}
Change-Id: I38f40d29945b22f9c308ea4b7ed6157ccadb3c7c
Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89230
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Maciej Strozek
Matt DeVillier
parent
35970abcdf
commit
f1c973bbff
5 changed files with 195 additions and 0 deletions
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@ -34,6 +34,7 @@
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#define MIPI_MFG_ID_CIRRUS 0x01fa
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#define MIPI_DEV_ID_CIRRUS_CS42L42 0x4242
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#define MIPI_DEV_ID_CIRRUS_CS42L43 0x4243
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#define MIPI_DEV_ID_CIRRUS_CS35L56 0x3556
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#define MIPI_DEV_ID_CIRRUS_CS35L57 0x3557
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#define MIPI_DEV_ID_CIRRUS_CS35L63 0x3563
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