From f1b471bda18963ece010e5bcf140d1426e228b4e Mon Sep 17 00:00:00 2001
From: "Ronald G. Minnich" <rminnich@gmail.com>
Date: Mon, 9 Dec 2002 16:00:53 +0000
Subject: [PATCH] fixed some usage issues with pci_ids.h

---
 src/include/pci_ids.h                     | 20 ++++++++++++++++++++
 src/northbridge/intel/E7500/northbridge.c | 10 ++++++++++
 2 files changed, 30 insertions(+)

diff --git a/src/include/pci_ids.h b/src/include/pci_ids.h
index 4149c50a2d..0845fd3e9c 100644
--- a/src/include/pci_ids.h
+++ b/src/include/pci_ids.h
@@ -385,6 +385,7 @@
 #define PCI_DEVICE_ID_AMD_VIPER_740C	0x740C
 #define PCI_DEVICE_ID_AMD_VIPER_7410	0x7410
 #define PCI_DEVICE_ID_AMD_VIPER_7411	0x7411
+#define PCI_DEVICE_ID_AMD_VIPER_7412    0x7412
 #define PCI_DEVICE_ID_AMD_VIPER_7413	0x7413
 #define PCI_DEVICE_ID_AMD_VIPER_7414	0x7414
 #define PCI_DEVICE_ID_AMD_VIPER_7440	0x7440
@@ -941,6 +942,7 @@
 #define PCI_DEVICE_ID_VIA_8363_0	0x0305
 #define PCI_DEVICE_ID_VIA_8371_0	0x0391
 #define PCI_DEVICE_ID_VIA_8501_0	0x0501
+#define PCI_DEVICE_ID_VIA_8601_0        0x0601
 #define PCI_DEVICE_ID_VIA_82C505	0x0505
 #define PCI_DEVICE_ID_VIA_82C561	0x0561
 #define PCI_DEVICE_ID_VIA_82C586_1	0x0571
@@ -1195,6 +1197,9 @@
 #define PCI_DEVICE_ID_ATT_L56XMF	0x0440
 #define PCI_DEVICE_ID_ATT_VENUS_MODEM	0x480
 
+#define PCI_VENDOR_ID_ACER              0x10b9   
+#define PCI_DEVICE_ID_ACER_M1535D         0x1533
+
 #define PCI_VENDOR_ID_SPECIALIX		0x11cb
 #define PCI_DEVICE_ID_SPECIALIX_IO8	0x2000
 #define PCI_DEVICE_ID_SPECIALIX_XIO	0x4000
@@ -1718,7 +1723,22 @@
 #define PCI_DEVICE_ID_INTEL_82454GX	0x84c4
 #define PCI_DEVICE_ID_INTEL_82450GX	0x84c5
 #define PCI_DEVICE_ID_INTEL_82451NX	0x84ca
+#define PCI_DEVICE_ID_INTEL_82454NX     0x84cb
 
+/* OLD USAGE FOR LINUXBIOS */
+#define PCI_DEVICE_ID_INTEL_82801CA_1E0 0x244e 
+#define PCI_DEVICE_ID_INTEL_82801CA_1F0 0x2480 
+#define PCI_DEVICE_ID_INTEL_82801CA_1F1 0x248b 
+#define PCI_DEVICE_ID_INTEL_82801CA_1D0 0x2482 
+#define PCI_DEVICE_ID_INTEL_82801CA_1F3 0x2483 
+#define PCI_DEVICE_ID_INTEL_82801CA_1D1 0x2484 
+#define PCI_DEVICE_ID_INTEL_82801CA_1F5 0x2485 
+#define PCI_DEVICE_ID_INTEL_82801CA_1D2 0x2487
+
+#define PCI_DEVICE_ID_INTEL_82870_1E0   0x1461 
+#define PCI_DEVICE_ID_INTEL_82870_1F0   0x1460 
+
+/* END OLDER USAGE */
 #define PCI_VENDOR_ID_COMPUTONE		0x8e0e
 #define PCI_DEVICE_ID_COMPUTONE_IP2EX	0x0291
 #define PCI_DEVICE_ID_COMPUTONE_PG	0x0302
diff --git a/src/northbridge/intel/E7500/northbridge.c b/src/northbridge/intel/E7500/northbridge.c
index 52e4576e9f..b3de702469 100644
--- a/src/northbridge/intel/E7500/northbridge.c
+++ b/src/northbridge/intel/E7500/northbridge.c
@@ -8,6 +8,8 @@
 struct mem_range *sizeram(void)
 {
 	static struct mem_range mem[4];
+	/* the units of tolm are 64 KB */
+	/* the units of drb16 are 64 MB */
 	uint16_t tolm, remapbase, remaplimit, drb16;
 	uint16_t tolm_r, remapbase_r, remaplimit_r;
 	uint8_t  drb;
@@ -21,13 +23,21 @@ struct mem_range *sizeram(void)
         if(get_option(&remap_high, "remap_memory_high")){
                 remap_high = 0;
         }
+	printk_debug("remap_high is %d\n", remap_high);
+	/* get out the value of the highest DRB. This tells the end of 
+	 * physical memory. The units are ticks of 64 MB i.e. 1 means
+	 * 64 MB. 
+	 */
 	pcibios_read_config_byte(0, 0, 0x67, &drb);
 	drb16 = (uint16_t)drb;
 	if(remap_high && (drb16 > 0x08)) {
 		/* We only come here if we have at least 512MB of memory,
 		 * so it is safe to hard code tolm.
+		 * 0x2000 means 512MB 
 		 */
+
 		tolm = 0x2000;
+		/* i.e 0x40 * 0x40 is 0x1000 which is 4 GB */
 		if(drb16 > 0x0040) {
 			/* There is more than 4GB of memory put
 			 * the remap window at the end of ram.