- Refix the protoptype for jmp_to_elf_entry, including fixing alpha code
- Updated to new pci code
This commit is contained in:
Eric W. Biederman
parent
bd7d5d918e
commit
f11b412d37
7 changed files with 1091 additions and 737 deletions
|
|
@ -390,7 +390,7 @@ typedef Elf64_Phdr Elf_phdr;
|
|||
#endif
|
||||
|
||||
extern int elf_check_arch(Elf_ehdr *ehdr);
|
||||
extern void jmp_to_elf_entry(void *entry, void * buffer);
|
||||
extern void jmp_to_elf_entry(void *entry, unsigned long buffer);
|
||||
struct stream;
|
||||
struct lb_memory;
|
||||
extern int elfload(struct stream *stream, struct lb_memory *mem,
|
||||
|
|
|
|||
|
|
@ -277,13 +277,35 @@
|
|||
|
||||
|
||||
#include <types.h>
|
||||
#include <resource.h>
|
||||
|
||||
struct pci_dev;
|
||||
struct pci_dev_operations {
|
||||
void (*read_resources)(struct pci_dev *dev);
|
||||
void (*set_resources)(struct pci_dev *dev);
|
||||
void (*init)(struct pci_dev *dev);
|
||||
unsigned int (*scan_bus)(struct pci_dev *bus, unsigned int max);
|
||||
};
|
||||
|
||||
|
||||
struct pci_driver {
|
||||
struct pci_dev_operations *ops;
|
||||
unsigned short vendor;
|
||||
unsigned short device;
|
||||
};
|
||||
|
||||
#define __pci_driver __attribute__ ((unused,__section__(".rodata.pci_driver")))
|
||||
extern struct pci_driver pci_drivers[];
|
||||
extern struct pci_driver epci_drivers[];
|
||||
|
||||
#define MAX_RESOURCES 6
|
||||
/*
|
||||
* There is one pci_dev structure for each slot-number/function-number
|
||||
* combination:
|
||||
*/
|
||||
struct pci_dev {
|
||||
struct pci_bus *bus; /* bus this device is on */
|
||||
struct pci_dev *bus; /* bus this device is on */
|
||||
struct pci_dev *children; /* devices behind this bridge */
|
||||
struct pci_dev *sibling; /* next device on this bus */
|
||||
struct pci_dev *next; /* chain of all devices */
|
||||
|
||||
|
|
@ -296,7 +318,10 @@ struct pci_dev {
|
|||
unsigned int class; /* 3 bytes: (base,sub,prog-if) */
|
||||
unsigned int hdr_type; /* PCI header type */
|
||||
unsigned int master : 1; /* set if device is master capable */
|
||||
u8 command;
|
||||
|
||||
unsigned char secondary; /* secondary bus number */
|
||||
unsigned char subordinate; /* max subordinate bus number */
|
||||
uint8_t command;
|
||||
/*
|
||||
* In theory, the irq level can be read from configuration
|
||||
* space and all would be fine. However, old PCI chips don't
|
||||
|
|
@ -313,38 +338,13 @@ struct pci_dev {
|
|||
/* Base registers for this device, can be adjusted by
|
||||
* pcibios_fixup() as necessary.
|
||||
*/
|
||||
unsigned long base_address[6];
|
||||
unsigned long size[6];
|
||||
struct resource resource[MAX_RESOURCES];
|
||||
unsigned int resources;
|
||||
unsigned long rom_address;
|
||||
struct pci_dev_operations *ops;
|
||||
};
|
||||
|
||||
struct pci_bus {
|
||||
struct pci_bus *parent; /* parent bus this bridge is on */
|
||||
struct pci_bus *children; /* chain of P2P bridges on this bus */
|
||||
struct pci_bus *next; /* chain of all PCI buses */
|
||||
|
||||
struct pci_dev *self; /* bridge device as seen by parent */
|
||||
struct pci_dev *devices; /* devices behind this bridge */
|
||||
|
||||
void *sysdata; /* hook for sys-specific extension */
|
||||
struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
|
||||
unsigned char number; /* bus number */
|
||||
unsigned char primary; /* number of primary bridge */
|
||||
unsigned char secondary; /* number of secondary bridge */
|
||||
unsigned char subordinate; /* max number of subordinate buses */
|
||||
|
||||
unsigned long mem, prefmem, io; /* amount of mem, prefetch mem,
|
||||
* and I/O needed for this bridge.
|
||||
* computed by compute_resources,
|
||||
* inclusive of all child bridges
|
||||
* and devices
|
||||
*/
|
||||
u32 membase, memlimit;
|
||||
u32 prefmembase, prefmemlimit;
|
||||
u32 iobase, iolimit;
|
||||
};
|
||||
|
||||
extern struct pci_bus pci_root; /* root bus */
|
||||
extern struct pci_dev pci_root; /* root bus */
|
||||
extern struct pci_dev *pci_devices; /* list of all devices */
|
||||
|
||||
/*
|
||||
|
|
@ -362,8 +362,6 @@ extern struct pci_dev *pci_devices; /* list of all devices */
|
|||
|
||||
int pcibios_present (void);
|
||||
void pcibios_init(void);
|
||||
void pcibios_fixup(void);
|
||||
void pcibios_fixup_bus(struct pci_bus *);
|
||||
char *pcibios_setup (char *str);
|
||||
int pcibios_read_config_byte (unsigned char bus, unsigned char dev_fn,
|
||||
unsigned char where, u8 *val);
|
||||
|
|
@ -393,22 +391,14 @@ int pcibios_find_device (unsigned short vendor, unsigned short dev_id,
|
|||
|
||||
/* Generic PCI interface functions */
|
||||
|
||||
void pci_init(void);
|
||||
void pci_setup(char *str, int *ints);
|
||||
void pci_quirks_init(void);
|
||||
unsigned int pci_scan_bus(struct pci_bus *bus);
|
||||
struct pci_bus *pci_scan_peer_bridge(int bus);
|
||||
void pci_proc_init(void);
|
||||
void proc_old_pci_init(void);
|
||||
int get_pci_list(char *buf);
|
||||
int pci_proc_attach_device(struct pci_dev *dev);
|
||||
int pci_proc_detach_device(struct pci_dev *dev);
|
||||
void pci_initiailize(void);
|
||||
unsigned int pci_scan_bus(struct pci_dev *bus, unsigned int max);
|
||||
unsigned int pci_scan_bridge(struct pci_dev *bus, unsigned int max);
|
||||
|
||||
struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
|
||||
struct pci_dev *pci_find_class (unsigned int class, struct pci_dev *from);
|
||||
struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
|
||||
|
||||
#define pci_present pcibios_present
|
||||
int pci_read_config_byte(struct pci_dev *dev, u8 where, u8 *val);
|
||||
int pci_read_config_word(struct pci_dev *dev, u8 where, u16 *val);
|
||||
int pci_read_config_dword(struct pci_dev *dev, u8 where, u32 *val);
|
||||
|
|
@ -423,21 +413,19 @@ void pci_set_method(void);
|
|||
void pci_enumerate(void);
|
||||
void pci_configure(void);
|
||||
void pci_enable(void);
|
||||
void pci_zero_irq_settings(void);
|
||||
|
||||
// historical functions ...
|
||||
void intel_conf_writeb(unsigned long port, unsigned char value);
|
||||
unsigned char intel_conf_readb(unsigned long port);
|
||||
|
||||
|
||||
#include <kmalloc.h>
|
||||
void pci_init(void);
|
||||
|
||||
// Rounding for boundaries.
|
||||
// Due to some chip bugs, go ahead and roung IO to 16
|
||||
#define IO_ALIGN 16
|
||||
#define IO_BRIDGE_ALIGN 4096
|
||||
#define MEM_ALIGN 4096
|
||||
#define IO_BRIDGE_ALIGN 4096
|
||||
#define MEM_BRIDGE_ALIGN (1024*1024)
|
||||
|
||||
extern void compute_allocate_resource(struct pci_dev *bus, struct resource *bridge,
|
||||
unsigned long type_mask, unsigned long type);
|
||||
extern void assign_resources(struct pci_dev *bus);
|
||||
extern void enumerate_static_device(void);
|
||||
#include <pciconf.h>
|
||||
|
||||
/* linkages from devices of a type (e.g. superio devices)
|
||||
|
|
|
|||
70
src/include/resource.h
Normal file
70
src/include/resource.h
Normal file
|
|
@ -0,0 +1,70 @@
|
|||
#ifndef RESOURCE_H
|
||||
#define RESOURCE_H
|
||||
|
||||
|
||||
#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
|
||||
|
||||
#define IORESOURCE_IO 0x00000100 /* Resource type */
|
||||
#define IORESOURCE_MEM 0x00000200
|
||||
#define IORESOURCE_IRQ 0x00000400
|
||||
#define IORESOURCE_DMA 0x00000800
|
||||
|
||||
#define IORESOURCE_PREFETCH 0x00001000 /* No side effects */
|
||||
#define IORESOURCE_READONLY 0x00002000
|
||||
#define IORESOURCE_CACHEABLE 0x00004000
|
||||
#define IORESOURCE_RANGELENGTH 0x00008000
|
||||
#define IORESOURCE_SHADOWABLE 0x00010000
|
||||
#define IORESOURCE_BUS_HAS_VGA 0x00020000
|
||||
|
||||
#define IORESOURCE_SET 0x80000000
|
||||
|
||||
/* PCI specific resource bits */
|
||||
#define IORESOURCE_PCI64 (1<<0) /* 64bit long pci resource */
|
||||
#define IORESOURCE_PCI_BRIDGE (1<<1) /* A bridge pci resource */
|
||||
|
||||
/* ISA PnP IRQ specific bits (IORESOURCE_BITS) */
|
||||
#define IORESOURCE_IRQ_HIGHEDGE (1<<0)
|
||||
#define IORESOURCE_IRQ_LOWEDGE (1<<1)
|
||||
#define IORESOURCE_IRQ_HIGHLEVEL (1<<2)
|
||||
#define IORESOURCE_IRQ_LOWLEVEL (1<<3)
|
||||
|
||||
/* ISA PnP DMA specific bits (IORESOURCE_BITS) */
|
||||
#define IORESOURCE_DMA_TYPE_MASK (3<<0)
|
||||
#define IORESOURCE_DMA_8BIT (0<<0)
|
||||
#define IORESOURCE_DMA_8AND16BIT (1<<0)
|
||||
#define IORESOURCE_DMA_16BIT (2<<0)
|
||||
|
||||
#define IORESOURCE_DMA_MASTER (1<<2)
|
||||
#define IORESOURCE_DMA_BYTE (1<<3)
|
||||
#define IORESOURCE_DMA_WORD (1<<4)
|
||||
|
||||
#define IORESOURCE_DMA_SPEED_MASK (3<<6)
|
||||
#define IORESOURCE_DMA_COMPATIBLE (0<<6)
|
||||
#define IORESOURCE_DMA_TYPEA (1<<6)
|
||||
#define IORESOURCE_DMA_TYPEB (2<<6)
|
||||
#define IORESOURCE_DMA_TYPEF (3<<6)
|
||||
|
||||
|
||||
/* ISA PnP memory I/O specific bits (IORESOURCE_BITS) */
|
||||
#define IORESOURCE_MEM_WRITEABLE (1<<0) /* dup: IORESOURCE_READONLY */
|
||||
#define IORESOURCE_MEM_CACHEABLE (1<<1) /* dup: IORESOURCE_CACHEABLE */
|
||||
#define IORESOURCE_MEM_RANGELENGTH (1<<2) /* dup: IORESOURCE_RANGELENGTH */
|
||||
#define IORESOURCE_MEM_TYPE_MASK (3<<3)
|
||||
#define IORESOURCE_MEM_8BIT (0<<3)
|
||||
#define IORESOURCE_MEM_16BIT (1<<3)
|
||||
#define IORESOURCE_MEM_8AND16BIT (2<<3)
|
||||
#define IORESOURCE_MEM_SHADOWABLE (1<<5) /* dup: IORESOURCE_SHADOWABLE */
|
||||
#define IORESOURCE_MEM_EXPANSIONROM (1<<6)
|
||||
|
||||
struct resource {
|
||||
unsigned long base; /* Base address of the resource */
|
||||
unsigned long size; /* Size of the resource */
|
||||
unsigned long limit; /* Largest valid value base + size -1 */
|
||||
unsigned long flags; /* Descriptions of the kind of resource */
|
||||
unsigned long index; /* Bus specific per device resource id */
|
||||
unsigned char align; /* Required alignment (base 2) of the resource */
|
||||
unsigned char gran; /* Granularity (base 2) of the resource */
|
||||
/* Alignment must be >= the granularity of the resource */
|
||||
};
|
||||
|
||||
#endif /* RESOURCE_H */
|
||||
Loading…
Add table
Add a link
Reference in a new issue