From f07a1a76f3c4f6d5d089f6f9d12326675200e9e8 Mon Sep 17 00:00:00 2001
From: Matt DeVillier <matt.devillier@gmail.com>
Date: Thu, 31 Aug 2023 10:11:15 -0500
Subject: [PATCH] mb/google/brya: Enable GNA scoring accelerator

Enable the GNA PCI device, and include the ACPI stub so the OS driver
can attach.

TEST=build/boot Win10 on google/brya (banshee)

Change-Id: Ib97278820d93a8fae52a74f36a5f60d9a9b2b363
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: CoolStar <coolstarorganization@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77577
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/brya/dsdt.asl                               | 1 +
 src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb | 1 +
 src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb  | 1 +
 src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb | 1 +
 src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb | 1 +
 5 files changed, 5 insertions(+)

diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl
index 4c1574e55f..4f82409565 100644
--- a/src/mainboard/google/brya/dsdt.asl
+++ b/src/mainboard/google/brya/dsdt.asl
@@ -27,6 +27,7 @@ DefinitionBlock(
 			#include <soc/intel/alderlake/acpi/southbridge.asl>
 			#include <soc/intel/alderlake/acpi/tcss.asl>
 			#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
+			#include <soc/intel/common/block/acpi/acpi/gna.asl>
 		}
 	}
 
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
index 3009f65703..d54c68d866 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
@@ -111,6 +111,7 @@ chip soc/intel/alderlake
 		device ref tbt_pcie_rp0 on end
 		device ref tbt_pcie_rp1 on end
 		device ref tbt_pcie_rp2 on end
+		device ref gna on end
 		device ref tcss_xhci on end
 		device ref tcss_dma0 on end
 		device ref tcss_dma1 on end
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 6160ebf084..71dfb54b46 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -162,6 +162,7 @@ chip soc/intel/alderlake
 		device ref tbt_pcie_rp0 on end
 		device ref tbt_pcie_rp1 on end
 		device ref tbt_pcie_rp2 on end
+		device ref gna on end
 		device ref tcss_xhci on end
 		device ref tcss_dma0 on end
 		device ref tcss_dma1 on end
diff --git a/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
index 6bd659dbce..54046b904b 100644
--- a/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
@@ -100,6 +100,7 @@ chip soc/intel/alderlake
 			}"
 		end
 		device ref dtt on end
+		device ref gna on end
 		device ref tcss_xhci on end
 		device ref xhci on end
 		device ref shared_sram on end
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
index 65d3518b7b..8b1cebd1a5 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
@@ -192,6 +192,7 @@ chip soc/intel/alderlake
 			register "gfx" = "GMA_DEFAULT_PANEL(0)"
 		end
 		device ref dtt on end
+		device ref gna on end
 		device ref tcss_xhci on end
 		device ref xhci on end
 		device ref shared_sram on end